diff options
author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-12 23:07:52 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 13:54:30 +0000 |
commit | cde4f3b2790d52ef38106c7ba91eea5d53e03a93 (patch) | |
tree | 72d65b1474c3115d336fae45d6a5990638dfaaef /src/southbridge | |
parent | a52b93b262582009decf924dbdde9bc1bf856ddb (diff) |
acpi/gnvs.c: Drop unused pointer to the cbmem console
Change-Id: I7e2018dbccead15fcd84e34df8207120d3a0c57c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64303
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Diffstat (limited to 'src/southbridge')
8 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl index 8c9813e091..bf9df6967b 100644 --- a/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl +++ b/src/southbridge/intel/bd82x6x/acpi/globalnvs.asl @@ -103,7 +103,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xf5), TPIQ, 8, // 0xf5 - trackpad IRQ value - CBMC, 32, + , 32, } External (\_TZ.SKIN) diff --git a/src/southbridge/intel/bd82x6x/include/soc/nvs.h b/src/southbridge/intel/bd82x6x/include/soc/nvs.h index 18f004a91f..86a8b10bd0 100644 --- a/src/southbridge/intel/bd82x6x/include/soc/nvs.h +++ b/src/southbridge/intel/bd82x6x/include/soc/nvs.h @@ -104,7 +104,7 @@ struct __packed global_nvs { u8 rsvd12[57]; u8 tpiq; /* 0xf5 - trackpad IRQ value */ - u32 cbmc; + u32 unused_was_cbmc; }; #endif /* SOUTHBRIDGE_INTEL_BD82X6X_NVS_H */ diff --git a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl index d9318c3ba3..c14421cb54 100644 --- a/src/southbridge/intel/i82801gx/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801gx/acpi/globalnvs.asl @@ -98,7 +98,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xf0), DOCK, 8, // 0xf0 - Docking Status BTEN, 8, // 0xf1 - Bluetooth Enable - CBMC, 32, + , 32, PM1I, 32, // System Wake Source - PM1 Index GPEI, 32, // GPE Wake Source } diff --git a/src/southbridge/intel/i82801gx/include/soc/nvs.h b/src/southbridge/intel/i82801gx/include/soc/nvs.h index 54e4832ace..8e8c0a1ac9 100644 --- a/src/southbridge/intel/i82801gx/include/soc/nvs.h +++ b/src/southbridge/intel/i82801gx/include/soc/nvs.h @@ -97,7 +97,7 @@ struct __packed global_nvs { u8 dock; /* 0xf0 - Docking Status */ u8 bten; - u32 cbmc; + u32 unused_was_cbmc; /* Required for future unified acpi_save_wake_source. */ u32 pm1i; diff --git a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl index e2209e6c9a..7e891c9015 100644 --- a/src/southbridge/intel/i82801ix/acpi/globalnvs.asl +++ b/src/southbridge/intel/i82801ix/acpi/globalnvs.asl @@ -100,7 +100,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) Offset (0xf0), DOCK, 8, // 0xf0 - Docking Status BTEN, 8, // 0xf1 - Bluetooth Enable - CBMC, 32, + , 32, PM1I, 32, // System Wake Source - PM1 Index GPEI, 32, // GPE Wake Source diff --git a/src/southbridge/intel/i82801ix/include/soc/nvs.h b/src/southbridge/intel/i82801ix/include/soc/nvs.h index af3f1d379d..fd136ba0bb 100644 --- a/src/southbridge/intel/i82801ix/include/soc/nvs.h +++ b/src/southbridge/intel/i82801ix/include/soc/nvs.h @@ -97,7 +97,7 @@ struct __packed global_nvs { u8 dock; /* 0xf0 - Docking Status */ u8 bten; - u32 cbmc; + u32 unused_was_cbmc; /* Required for future unified acpi_save_wake_source. */ u32 pm1i; diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl index 754b161af5..01a4d9b73a 100644 --- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl +++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl @@ -90,7 +90,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) S7B1, 32, // 0x9c - D23:F0 Serial IO SDIO BAR1 Offset (0xa0), - CBMC, 32, // 0xa0 - coreboot mem console pointer + , 32, // 0xa0 - coreboot mem console pointer PM1I, 32, // System Wake Source - PM1 Index GPEI, 32, // GPE Wake Source diff --git a/src/southbridge/intel/lynxpoint/include/soc/nvs.h b/src/southbridge/intel/lynxpoint/include/soc/nvs.h index 1996ebab2b..3fe1ee79be 100644 --- a/src/southbridge/intel/lynxpoint/include/soc/nvs.h +++ b/src/southbridge/intel/lynxpoint/include/soc/nvs.h @@ -72,7 +72,7 @@ struct __packed global_nvs { /* LynxPoint Serial IO device BARs */ u32 s0b[8]; /* 0x60 - 0x7f - BAR0 */ u32 s1b[8]; /* 0x80 - 0x9f - BAR1 */ - u32 cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ + u32 unused_was_cbmc; /* 0xa0 - 0xa3 - coreboot memconsole */ /* Required for future unified acpi_save_wake_source. */ u32 pm1i; |