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authorKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-12 15:23:25 +0200
committerKyösti Mälkki <kyosti.malkki@gmail.com>2021-01-28 08:59:11 +0000
commitae7ac8a72372e4099bcf0667b5f97b4a223da48d (patch)
treeae4d809a4cfa01711a76da4a5b5ca234f80ff778 /src/southbridge/intel/lynxpoint/acpi
parentfa5f9b5aff2279d6304a8b197e12714934025575 (diff)
ACPI: Separate ChromeOS NVS in ASL
For builds with MAINBOARD_HAS_CHROMEOS=y but CHROMEOS=n, there is reduced dsdt.aml size and reduced GNVS allocation from cbmem. More importantly, it's less error-prone when the OperationRegion size is not hard-coded inside the .asl files. Change-Id: I54b0d63a41561f9a5d9ebde77967e6d21ee014cd Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/49477 Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/southbridge/intel/lynxpoint/acpi')
-rw-r--r--src/southbridge/intel/lynxpoint/acpi/globalnvs.asl4
1 files changed, 0 insertions, 4 deletions
diff --git a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
index 179a9912cc..f4071f1144 100644
--- a/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
+++ b/src/southbridge/intel/lynxpoint/acpi/globalnvs.asl
@@ -93,10 +93,6 @@ Field (GNVS, ByteAcc, NoLock, Preserve)
Offset (0xa0),
CBMC, 32, // 0xa0 - coreboot mem console pointer
-
- /* ChromeOS specific */
- Offset (0x100),
- #include <vendorcode/google/chromeos/acpi/gnvs.asl>
}
/* Set flag to enable USB charging in S3 */