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authorStefan Reinauer <reinauer@chromium.org>2013-08-01 13:31:44 -0700
committerKyösti Mälkki <kyosti.malkki@gmail.com>2015-01-05 22:21:49 +0100
commit3a6550d989460f9449136814a8b1f6b051a6382d (patch)
treed60bdfd55ddcc5e45042c987d5216d9212784f60 /src/southbridge/intel/fsp_rangeley/romstage.c
parent83405a1241f4b8f516f687bd00f8ea981f7c7d87 (diff)
timestamps: Switch from tsc_t to uint64_t
Cherry-pick from chromium and adjusted for added boards and changed directory layout for arch/arm. Timestamp implementation for ARMv7 Abstract the use of rdtsc() and make the timestamps uint64_t in the generic code. The ARM implementation uses the monotonic timer. Original-Signed-off-by: Stefan Reinauer <reinauer@google.com> BRANCH=none BUG=chrome-os-partner:18637 TEST=See cbmem print timestamps Original-Change-Id: Id377ba570094c44e6895ae75f8d6578c8865ea62 Original-Reviewed-on: https://gerrit.chromium.org/gerrit/63793 (cherry-picked from commit cc1a75e059020a39146e25b9198b0d58aa03924c) Change-Id: Ic51fb78ddd05ba81906d9c3b35043fa14fbbed75 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/8020 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
Diffstat (limited to 'src/southbridge/intel/fsp_rangeley/romstage.c')
-rw-r--r--src/southbridge/intel/fsp_rangeley/romstage.c16
1 files changed, 8 insertions, 8 deletions
diff --git a/src/southbridge/intel/fsp_rangeley/romstage.c b/src/southbridge/intel/fsp_rangeley/romstage.c
index 6c5751e272..fba9eb68c2 100644
--- a/src/southbridge/intel/fsp_rangeley/romstage.c
+++ b/src/southbridge/intel/fsp_rangeley/romstage.c
@@ -95,11 +95,9 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
void *cbmem_hob_ptr;
#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS)
- tsc_t after_initram_time = rdtsc();
- tsc_t base_time;
- base_time.hi = 0;
- base_time.lo = 0;
+ uint64_t after_initram_time = timestamp_get();
#endif
+
post_code(0x48);
printk(BIOS_DEBUG, "%s status: %x hob_list_ptr: %x\n",
__func__, (u32) status, (u32) hob_list_ptr);
@@ -129,12 +127,9 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
*(u32*)cbmem_hob_ptr = (u32)hob_list_ptr;
post_code(0x4e);
-#if IS_ENABLED(CONFIG_COLLECT_TIMESTAMPS)
- timestamp_init(base_time);
- timestamp_reinit();
+ timestamp_init(get_initial_timestamp());
timestamp_add(TS_AFTER_INITRAM, after_initram_time);
timestamp_add_now(TS_END_ROMSTAGE);
-#endif
post_code(0x4f);
@@ -142,3 +137,8 @@ void romstage_main_continue(EFI_STATUS status, void *hob_list_ptr) {
copy_and_run();
while (1);
}
+
+uint64_t get_initial_timestamp(void)
+{
+ return 0;
+}