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author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-06-30 07:34:36 +0300 |
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committer | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2014-07-14 19:43:03 +0200 |
commit | 9f0a2be1658cf6d329aefac2660a53a465312468 (patch) | |
tree | 7efd750712c5c829761e065605cee3b4b3f8b788 /src/southbridge/amd/Kconfig | |
parent | 1110495de926db4b21b9969da522e5270c67f115 (diff) |
AMD SPI: Optimise for longer writes
Leave it to the implementation of flash->write() to split the writes
to match SPI controller and SPI flash part restrictions. This allows
for some optimisation for auto-address-increment (AAI) commands.
Kconfig AMD_SB_SPI_TX_LEN can be kept as local.
Change-Id: I4a8bc55ab7eb0eeda8f25003a8f5ff2a643ab7a7
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: http://review.coreboot.org/6164
Tested-by: build bot (Jenkins)
Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
Diffstat (limited to 'src/southbridge/amd/Kconfig')
-rw-r--r-- | src/southbridge/amd/Kconfig | 9 |
1 files changed, 0 insertions, 9 deletions
diff --git a/src/southbridge/amd/Kconfig b/src/southbridge/amd/Kconfig index 39aeb09455..867afcaf8b 100644 --- a/src/southbridge/amd/Kconfig +++ b/src/southbridge/amd/Kconfig @@ -14,12 +14,3 @@ source src/southbridge/amd/sb800/Kconfig source src/southbridge/amd/cimx/Kconfig source src/southbridge/amd/agesa/Kconfig source src/southbridge/amd/sr5650/Kconfig - -if CPU_AMD_AGESA - -config AMD_SB_SPI_TX_LEN - int - default 4 - depends on SPI_FLASH - -endif |