From 9f0a2be1658cf6d329aefac2660a53a465312468 Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Mon, 30 Jun 2014 07:34:36 +0300 Subject: AMD SPI: Optimise for longer writes MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Leave it to the implementation of flash->write() to split the writes to match SPI controller and SPI flash part restrictions. This allows for some optimisation for auto-address-increment (AAI) commands. Kconfig AMD_SB_SPI_TX_LEN can be kept as local. Change-Id: I4a8bc55ab7eb0eeda8f25003a8f5ff2a643ab7a7 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6164 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/southbridge/amd/Kconfig | 9 --------- 1 file changed, 9 deletions(-) (limited to 'src/southbridge/amd/Kconfig') diff --git a/src/southbridge/amd/Kconfig b/src/southbridge/amd/Kconfig index 39aeb09455..867afcaf8b 100644 --- a/src/southbridge/amd/Kconfig +++ b/src/southbridge/amd/Kconfig @@ -14,12 +14,3 @@ source src/southbridge/amd/sb800/Kconfig source src/southbridge/amd/cimx/Kconfig source src/southbridge/amd/agesa/Kconfig source src/southbridge/amd/sr5650/Kconfig - -if CPU_AMD_AGESA - -config AMD_SB_SPI_TX_LEN - int - default 4 - depends on SPI_FLASH - -endif -- cgit v1.2.3