aboutsummaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorFelix Held <felix-coreboot@felixheld.de>2023-12-12 19:37:24 +0100
committerFelix Held <felix-coreboot@felixheld.de>2023-12-13 20:39:24 +0000
commitfa3f1171efa7b78a655f2225504d3a81891de3da (patch)
treebb70bf58a81b43f2c4faa27d0b40a1ec62c9624b /src/soc
parentc8dfd6d935505ae45783cb1e15ea0a6683938b0c (diff)
soc/amd/genoa/acpi: update soc.asl
Add the missing parts in soc.asl. Compared to earlier versions of this, the includes related to S0i3 and DPTC were removed. Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I89ecf469e44ca2a3b35c9fcf57c008ff29e7b9bd Reviewed-on: https://review.coreboot.org/c/coreboot/+/79468 Reviewed-by: Martin L Roth <gaumless@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/amd/genoa/acpi/soc.asl23
1 files changed, 23 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/acpi/soc.asl b/src/soc/amd/genoa/acpi/soc.asl
index 0959ecab9d..75344dc325 100644
--- a/src/soc/amd/genoa/acpi/soc.asl
+++ b/src/soc/amd/genoa/acpi/soc.asl
@@ -5,6 +5,12 @@
Scope(\_SB) {
/* global utility methods expected within the \_SB scope */
+ #include <arch/x86/acpi/globutil.asl>
+
+ #include <soc/amd/common/acpi/gpio_bank_lib.asl>
+
+ #include <soc/amd/common/acpi/osc.asl>
+
#include "pci_int_defs.asl"
#include "mmio.asl"
@@ -14,3 +20,20 @@ Scope(\_SB) {
ROOT_BRIDGE(S0B2)
ROOT_BRIDGE(S0B3)
} /* End \_SB scope */
+
+#include <soc/amd/common/acpi/alib.asl>
+
+#include <soc/amd/common/acpi/platform.asl>
+
+#include <soc/amd/common/acpi/sleepstates.asl>
+
+/*
+ * Platform Notify
+ *
+ * This is called by soc/amd/common/acpi/platform.asl.
+ */
+Method (PNOT)
+{
+ /* Report AC/DC state to ALIB using WAL1() */
+ \WAL1 ()
+}