From fa3f1171efa7b78a655f2225504d3a81891de3da Mon Sep 17 00:00:00 2001
From: Felix Held <felix-coreboot@felixheld.de>
Date: Tue, 12 Dec 2023 19:37:24 +0100
Subject: soc/amd/genoa/acpi: update soc.asl

Add the missing parts in soc.asl. Compared to earlier versions of this,
the includes related to S0i3 and DPTC were removed.

Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I89ecf469e44ca2a3b35c9fcf57c008ff29e7b9bd
Reviewed-on: https://review.coreboot.org/c/coreboot/+/79468
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/soc/amd/genoa/acpi/soc.asl | 23 +++++++++++++++++++++++
 1 file changed, 23 insertions(+)

(limited to 'src/soc')

diff --git a/src/soc/amd/genoa/acpi/soc.asl b/src/soc/amd/genoa/acpi/soc.asl
index 0959ecab9d..75344dc325 100644
--- a/src/soc/amd/genoa/acpi/soc.asl
+++ b/src/soc/amd/genoa/acpi/soc.asl
@@ -5,6 +5,12 @@
 
 Scope(\_SB) {
 	/* global utility methods expected within the \_SB scope */
+	#include <arch/x86/acpi/globutil.asl>
+
+	#include <soc/amd/common/acpi/gpio_bank_lib.asl>
+
+	#include <soc/amd/common/acpi/osc.asl>
+
 	#include "pci_int_defs.asl"
 
 	#include "mmio.asl"
@@ -14,3 +20,20 @@ Scope(\_SB) {
 	ROOT_BRIDGE(S0B2)
 	ROOT_BRIDGE(S0B3)
 } /* End \_SB scope */
+
+#include <soc/amd/common/acpi/alib.asl>
+
+#include <soc/amd/common/acpi/platform.asl>
+
+#include <soc/amd/common/acpi/sleepstates.asl>
+
+/*
+ * Platform Notify
+ *
+ * This is called by soc/amd/common/acpi/platform.asl.
+ */
+Method (PNOT)
+{
+	/* Report AC/DC state to ALIB using WAL1() */
+	\WAL1 ()
+}
-- 
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