diff options
| author | Patrick Georgi <pgeorgi@chromium.org> | 2015-04-02 19:44:19 +0200 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2015-04-04 20:07:18 +0200 |
| commit | 56b830938af3638538558ba92ac6c168b6a217ef (patch) | |
| tree | a31114695b6727f4a2984633e34640a784fef1b1 /src/soc | |
| parent | 990e7c90f035f0c9363e0c65100373795758a1da (diff) | |
build system: rename __BOOT_BLOCK__ and __VER_STAGE__
Drop the inner underscore for consistency. Follows the
commit stated below.
Change-Id: I75cde6e2cd55d2c0fbb5a2d125c359d91e14cf6d
Signed-off-by: Patrick Georgi <pgeorgi@chromium.org>
Based-on-Change-Id: I6a1f25f7077328a8b5201a79b18fc4c2e22d0b06
Based-on-Signed-off-by: Julius Werner <jwerner@chromium.org>
Based-on-Reviewed-on: https://chromium-review.googlesource.com/219172
Reviewed-on: http://review.coreboot.org/9290
Reviewed-by: Aaron Durbin <adurbin@google.com>
Tested-by: build bot (Jenkins)
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/intel/fsp_baytrail/baytrail/gpio.h | 8 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5250/gpio.c | 4 | ||||
| -rw-r--r-- | src/soc/samsung/exynos5420/gpio.c | 4 |
3 files changed, 8 insertions, 8 deletions
diff --git a/src/soc/intel/fsp_baytrail/baytrail/gpio.h b/src/soc/intel/fsp_baytrail/baytrail/gpio.h index e06c8d6bee..bdbb4a56dc 100644 --- a/src/soc/intel/fsp_baytrail/baytrail/gpio.h +++ b/src/soc/intel/fsp_baytrail/baytrail/gpio.h @@ -300,7 +300,7 @@ #define GPSSUS_GPIO_F1_RANGE_START 11 #define GPSSUS_GPIO_F1_RANGE_END 21 -#ifndef __BOOT_BLOCK__ +#ifndef __BOOTBLOCK__ struct soc_gpio_map { u32 pad_conf0; @@ -344,7 +344,7 @@ uint8_t read_ssus_gpio(uint8_t gpio_num); void configure_ssus_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val); void configure_score_gpio(uint8_t gpio_num, uint32_t pconf0, uint32_t pad_val); -#endif /* #ifndef __BOOT_BLOCK__ */ +#endif /* #ifndef __BOOTBLOCK__ */ /* Functions / defines for changing GPIOs in romstage */ /* SCORE Pad definitions. */ @@ -385,7 +385,7 @@ static inline void ssus_select_func(int pad, int func) write32(pconf0_addr, reg); } -#ifndef __BOOT_BLOCK__ +#ifndef __BOOTBLOCK__ /* These functions require that the input pad be configured as an input GPIO */ static inline int score_get_gpio(int pad) @@ -408,6 +408,6 @@ static inline void ssus_disable_internal_pull(int pad) write32(ssus_pconf0(pad), read32(ssus_pconf0(pad)) & pull_mask); } -#endif /* #ifndef __BOOT_BLOCK__ */ +#endif /* #ifndef __BOOTBLOCK__ */ #endif /* _BAYTRAIL_GPIO_H_ */ diff --git a/src/soc/samsung/exynos5250/gpio.c b/src/soc/samsung/exynos5250/gpio.c index 2a93328a70..3e50791ede 100644 --- a/src/soc/samsung/exynos5250/gpio.c +++ b/src/soc/samsung/exynos5250/gpio.c @@ -211,7 +211,7 @@ int gpio_set_value(unsigned gpio, int value) */ #define GPIO_DELAY_US 5 -#ifndef __BOOT_BLOCK__ +#ifndef __BOOTBLOCK__ /* * FIXME(dhendrix): These functions use udelay, which has dependencies on * pwm code and timer code. These aren't necessary for the bootblock and @@ -252,7 +252,7 @@ int gpio_read_mvl3(unsigned gpio) return value; } -#endif /* __BOOT_BLOCK__ */ +#endif /* __BOOTBLOCK__ */ /* * Display Exynos GPIO information diff --git a/src/soc/samsung/exynos5420/gpio.c b/src/soc/samsung/exynos5420/gpio.c index 2b65eda04e..ac82bf7eb1 100644 --- a/src/soc/samsung/exynos5420/gpio.c +++ b/src/soc/samsung/exynos5420/gpio.c @@ -211,7 +211,7 @@ int gpio_set_value(unsigned gpio, int value) */ #define GPIO_DELAY_US 15 -#ifndef __BOOT_BLOCK__ +#ifndef __BOOTBLOCK__ /* * FIXME(dhendrix): These functions use udelay, which has dependencies on * pwm code and timer code. These aren't necessary for the bootblock and @@ -252,7 +252,7 @@ int gpio_read_mvl3(unsigned gpio) return value; } -#endif /* __BOOT_BLOCK__ */ +#endif /* __BOOTBLOCK__ */ /* * Display Exynos GPIO information |