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authorYidi Lin <yidi.lin@mediatek.com>2021-04-22 13:34:04 +0800
committerHung-Te Lin <hungte@chromium.org>2021-04-26 02:42:33 +0000
commit6968782ac0309bd0178eb4a421355e1bb7bf3a92 (patch)
treef50a54a2fe0c3a800044a6148b82816d7ad4f669 /src/soc/mediatek/common/include
parentfdad5ad74baea3f29495126c31159a9bcb352d79 (diff)
soc/mediatek/mt8195: Initialize watchdog
MT8195 requires writing speical value to mode register to clear status register. This value is invalid on other platforms. We can do this safely in the common watchdog driver. Signed-off-by: Yidi Lin <yidi.lin@mediatek.com> Change-Id: Iba5b41f426fc38719bb343a220e0724bff229c79 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52542 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Yu-Ping Wu <yupingso@google.com>
Diffstat (limited to 'src/soc/mediatek/common/include')
-rw-r--r--src/soc/mediatek/common/include/soc/wdt.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/mediatek/common/include/soc/wdt.h b/src/soc/mediatek/common/include/soc/wdt.h
index 44ab5c7700..5847d4953f 100644
--- a/src/soc/mediatek/common/include/soc/wdt.h
+++ b/src/soc/mediatek/common/include/soc/wdt.h
@@ -21,6 +21,7 @@ struct mtk_wdt_regs {
/* WDT_MODE */
enum {
MTK_WDT_MODE_KEY = 0x22000000,
+ MTK_WDT_CLR_STATUS = 0x230001FF,
MTK_WDT_MODE_DUAL_MODE = 1 << 6,
MTK_WDT_MODE_IRQ = 1 << 3,
MTK_WDT_MODE_EXTEN = 1 << 2,