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authorElyes Haouas <ehaouas@noos.fr>2022-12-11 10:31:07 +0100
committerFelix Held <felix-coreboot@felixheld.de>2022-12-13 14:30:07 +0000
commitbc849b5459c53e1787991a7d65d0795bb5fafba4 (patch)
tree52584fdb5bd96bb3e3536393b6b660802bfb6b19 /src/soc/intel
parentf12c2b0837f9dfdf70e04a87215695f6d859f719 (diff)
soc/intel/baytrail/pmutil.c: Use {read,write}32p()
Change-Id: I6168be71913d00eb59d38dd4c5cf8f9c7f7ab678 Signed-off-by: Elyes Haouas <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/70581 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/baytrail/pmutil.c8
1 files changed, 4 insertions, 4 deletions
diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c
index d00166047d..93024d9fba 100644
--- a/src/soc/intel/baytrail/pmutil.c
+++ b/src/soc/intel/baytrail/pmutil.c
@@ -319,12 +319,12 @@ void clear_pmc_status(void)
uint32_t prsts;
uint32_t gen_pmcon1;
- prsts = read32((void *)(PMC_BASE_ADDRESS + PRSTS));
- gen_pmcon1 = read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1));
+ prsts = read32p(PMC_BASE_ADDRESS + PRSTS);
+ gen_pmcon1 = read32p(PMC_BASE_ADDRESS + GEN_PMCON1);
/* Clear the status bits. The RPS field is cleared on a 0 write. */
- write32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS);
- write32((void *)(PMC_BASE_ADDRESS + PRSTS), prsts);
+ write32p(PMC_BASE_ADDRESS + GEN_PMCON1, gen_pmcon1 & ~RPS);
+ write32p(PMC_BASE_ADDRESS + PRSTS, prsts);
}
int rtc_failure(void)