From bc849b5459c53e1787991a7d65d0795bb5fafba4 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Sun, 11 Dec 2022 10:31:07 +0100 Subject: soc/intel/baytrail/pmutil.c: Use {read,write}32p() Change-Id: I6168be71913d00eb59d38dd4c5cf8f9c7f7ab678 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/70581 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai --- src/soc/intel/baytrail/pmutil.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-) (limited to 'src/soc/intel') diff --git a/src/soc/intel/baytrail/pmutil.c b/src/soc/intel/baytrail/pmutil.c index d00166047d..93024d9fba 100644 --- a/src/soc/intel/baytrail/pmutil.c +++ b/src/soc/intel/baytrail/pmutil.c @@ -319,12 +319,12 @@ void clear_pmc_status(void) uint32_t prsts; uint32_t gen_pmcon1; - prsts = read32((void *)(PMC_BASE_ADDRESS + PRSTS)); - gen_pmcon1 = read32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1)); + prsts = read32p(PMC_BASE_ADDRESS + PRSTS); + gen_pmcon1 = read32p(PMC_BASE_ADDRESS + GEN_PMCON1); /* Clear the status bits. The RPS field is cleared on a 0 write. */ - write32((void *)(PMC_BASE_ADDRESS + GEN_PMCON1), gen_pmcon1 & ~RPS); - write32((void *)(PMC_BASE_ADDRESS + PRSTS), prsts); + write32p(PMC_BASE_ADDRESS + GEN_PMCON1, gen_pmcon1 & ~RPS); + write32p(PMC_BASE_ADDRESS + PRSTS, prsts); } int rtc_failure(void) -- cgit v1.2.3