diff options
| author | Felix Singer <felixsinger@posteo.net> | 2021-12-30 23:45:50 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-05-17 12:57:15 +0000 |
| commit | 9bbc039c457774dbeb44ea37ecc6507144d49b61 (patch) | |
| tree | 499b6a76789b5ba8e58f22e072b55103ffaf8498 /src/soc/intel | |
| parent | 89c497b6d1aaaf0de399977279940d7c2bc00769 (diff) | |
soc/intel/skylake: Hook up FSP hyper-threading setting to option API
Hook up the hyper-threading setting from the FSP to the option API so
that related mainboards don't have to do that. Unless otherwise
configured (e.g. the CMOS setting or overriden by the mainboard code),
the value from the Kconfig setting `FSP_HYPERTHREADING` is used.
Also, remove related code from the mainboard kontron/bsl6, since it is
obsolete now.
Change-Id: I1023d1b94acb63f30455c56b394b68059deaaa16
Signed-off-by: Felix Singer <felixsinger@posteo.net>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60542
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/skylake/romstage/fsp_params.c | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/src/soc/intel/skylake/romstage/fsp_params.c b/src/soc/intel/skylake/romstage/fsp_params.c index d7e1157376..f24054a6b7 100644 --- a/src/soc/intel/skylake/romstage/fsp_params.c +++ b/src/soc/intel/skylake/romstage/fsp_params.c @@ -4,6 +4,7 @@ #include <cpu/x86/msr.h> #include <fsp/util.h> #include <intelblocks/cpulib.h> +#include <option.h> #include <soc/iomap.h> #include <soc/msr.h> #include <soc/pci_devs.h> @@ -101,7 +102,7 @@ static void soc_memory_init_params(FSP_M_CONFIG *m_cfg, /* HPET BDF already handled in coreboot code, so tell FSP to ignore UPDs */ m_cfg->PchHpetBdfValid = 0; - m_cfg->HyperThreading = CONFIG(FSP_HYPERTHREADING); + m_cfg->HyperThreading = get_uint_option("hyper_threading", CONFIG(FSP_HYPERTHREADING)); } static void soc_primary_gfx_config_params(FSP_M_CONFIG *m_cfg, |