diff options
| author | Kyösti Mälkki <kyosti.malkki@gmail.com> | 2023-04-28 08:30:00 +0300 |
|---|---|---|
| committer | Matt DeVillier <matt.devillier@amd.corp-partner.google.com> | 2023-05-09 15:34:23 +0000 |
| commit | 9641c0e1023ca137e76762e11425695c34c1edbc (patch) | |
| tree | 42fc6953c01d901b6191efbdf7316c4bd47fad7f /src/soc/intel | |
| parent | effc28f23e4f9c106335af3a35096d9105810a8d (diff) | |
soc/intel/xeon_sp/spr: Drop spurious FADT fields
Assigning duty_offset while duty_width==0 has no purpose.
Under intel/common/block, previous assignment for fadt->gpe0_blk
resolves GPE0_STS(0) from xeon_sp/ebg/.../soc_pm.h and also assigns
value matching pmbase + 0x60.
Change-Id: Iaf688d9471ac527ac20307cf16216abdab731a06
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74827
Reviewed-by: Paul Menzel <paulepanter@mailbox.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel')
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/soc_acpi.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/src/soc/intel/xeon_sp/spr/soc_acpi.c b/src/soc/intel/xeon_sp/spr/soc_acpi.c index 0233c37967..18ebe721c4 100644 --- a/src/soc/intel/xeon_sp/spr/soc_acpi.c +++ b/src/soc/intel/xeon_sp/spr/soc_acpi.c @@ -47,8 +47,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt) fadt->preferred_pm_profile = PM_ENTERPRISE_SERVER; fadt->pm2_cnt_blk = pmbase + PM2_CNT; fadt->pm2_cnt_len = 1; - fadt->gpe0_blk = pmbase + 0x60; - fadt->duty_offset = 1; fadt->x_pm1b_evt_blk.space_id = ACPI_ADDRESS_SPACE_IO; fadt->x_pm1b_cnt_blk.space_id = ACPI_ADDRESS_SPACE_IO; |