diff options
| author | Shuo Liu <shuo.liu@intel.com> | 2024-10-23 04:20:18 +0800 |
|---|---|---|
| committer | Lean Sheng Tan <sheng.tan@9elements.com> | 2024-11-08 07:21:57 +0000 |
| commit | 9c7ce22de917deaf2911803caa71d510814ec3c3 (patch) | |
| tree | 21b9f5eb1f1b1b9c122b2ae748ab07480e456374 /src/soc/intel/xeon_sp/spr | |
| parent | 2c98b3ad235a63ec279990a694f91e32098f3da5 (diff) | |
soc/intel/xeon_sp/gnr: Enable IRQ routing
Enable IRQ routing per PCH IRQ usage convention and report domain
_PRT.
Change-Id: I095c7a302894437c90d854ce4e30467357eee2ba
Signed-off-by: Lu, Pen-ChunX <pen-chunx.lu@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/84328
Reviewed-by: Martin L Roth <gaumless@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr')
| -rw-r--r-- | src/soc/intel/xeon_sp/spr/Makefile.mk | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/xeon_sp/spr/Makefile.mk b/src/soc/intel/xeon_sp/spr/Makefile.mk index 0c4f0635e3..c5f9ece677 100644 --- a/src/soc/intel/xeon_sp/spr/Makefile.mk +++ b/src/soc/intel/xeon_sp/spr/Makefile.mk @@ -15,7 +15,7 @@ romstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c ramstage-y += chip.c cpu.c soc_util.c ramstage.c soc_acpi.c reset.c ramstage-y += crashlog.c ioat.c -ramstage-y += ../chip_gen1.c +ramstage-y += ../chip_gen1.c ../lpc_gen1.c ramstage-$(CONFIG_DISPLAY_HOBS) += hob_display.c ramstage-$(CONFIG_DISPLAY_UPD_DATA) += upd_display.c CPPFLAGS_common += -I$(src)/soc/intel/xeon_sp/spr/include -I$(src)/soc/intel/xeon_sp/spr |