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authorTim Chu <Tim.Chu@quantatw.com>2023-02-17 03:00:39 +0000
committerFelix Held <felix-coreboot@felixheld.de>2023-02-22 14:34:16 +0000
commit68107ddcbc4ac2ba40f84703b662eafbd28e042e (patch)
tree99ae3c9d33facd02e5d1ef3366256ad4e9a7e4a3 /src/soc/intel/xeon_sp/spr/Kconfig
parent9ac47c871f75dd17e27892293c7b94e4691631d0 (diff)
soc/intel/xeon_sp/spr: Add common device tree
Add common device tree used for EGS platform. Also add register setting shared for all EGS platform. Signed-off-by: Tim Chu <Tim.Chu@quantatw.com> Change-Id: I812f621ee9d1643fd4fa35df92443d64f7aaabc3 Reviewed-on: https://review.coreboot.org/c/coreboot/+/73077 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Zhang <jonzhang@fb.com> Reviewed-by: Simon Chou <simonchou@supermicro.com.tw> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/intel/xeon_sp/spr/Kconfig')
-rw-r--r--src/soc/intel/xeon_sp/spr/Kconfig4
1 files changed, 4 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index 0c60f8c2f7..b1d92cfdd2 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -8,6 +8,10 @@ config SOC_SPECIFIC_OPTIONS
select SAVE_MRC_AFTER_FSPS
select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
+config CHIPSET_DEVICETREE
+ string
+ default "soc/intel/xeon_sp/spr/chipset.cb"
+
config FSP_HEADER_PATH
string "Location of FSP headers"
depends on MAINBOARD_USES_FSP2_0