From 68107ddcbc4ac2ba40f84703b662eafbd28e042e Mon Sep 17 00:00:00 2001
From: Tim Chu <Tim.Chu@quantatw.com>
Date: Fri, 17 Feb 2023 03:00:39 +0000
Subject: soc/intel/xeon_sp/spr: Add common device tree

Add common device tree used for EGS platform. Also add register
setting shared for all EGS platform.

Signed-off-by: Tim Chu <Tim.Chu@quantatw.com>
Change-Id: I812f621ee9d1643fd4fa35df92443d64f7aaabc3
Reviewed-on: https://review.coreboot.org/c/coreboot/+/73077
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jonzhang@fb.com>
Reviewed-by: Simon Chou <simonchou@supermicro.com.tw>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
---
 src/soc/intel/xeon_sp/spr/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

(limited to 'src/soc/intel/xeon_sp/spr/Kconfig')

diff --git a/src/soc/intel/xeon_sp/spr/Kconfig b/src/soc/intel/xeon_sp/spr/Kconfig
index 0c60f8c2f7..b1d92cfdd2 100644
--- a/src/soc/intel/xeon_sp/spr/Kconfig
+++ b/src/soc/intel/xeon_sp/spr/Kconfig
@@ -8,6 +8,10 @@ config SOC_SPECIFIC_OPTIONS
 	select SAVE_MRC_AFTER_FSPS
 	select SOC_INTEL_MEM_MAPPED_PM_CONFIGURATION
 
+config CHIPSET_DEVICETREE
+	string
+	default "soc/intel/xeon_sp/spr/chipset.cb"
+
 config FSP_HEADER_PATH
 	string "Location of FSP headers"
 	depends on MAINBOARD_USES_FSP2_0
-- 
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