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authorArthur Heymans <arthur@aheymans.xyz>2020-10-22 17:11:22 +0200
committerHung-Te Lin <hungte@chromium.org>2020-12-14 08:25:10 +0000
commit77509be2c8c3196075669a300954fda5a1ff28c2 (patch)
treeb1820e9bcdc528fc46300ae6eba794df589034aa /src/soc/intel/xeon_sp/skx
parentcfe526dce2b76cce3b4d1009bad676e2ec21afab (diff)
soc/intel/xeon_sp: Configure DPR on all stacks
Configure DPR to span the region between cbmem_top and TSEG base. This region was already unavailable to the OS. Change-Id: Ia0d34e50b3d577f19172619156352534f740ea6b Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/c/coreboot/+/46818 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/skx')
-rw-r--r--src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
index 353955566b..ce223cc2d4 100644
--- a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h
@@ -128,6 +128,7 @@
#define HPET0_FUNC_NUM 0x00
#define MMAP_VTD_CFG_REG_DEVID 0x2024
+#define MMAP_VTD_STACK_CFG_REG_DEVID 0x2034
#define VTD_DEV_NUM 0x5
#define VTD_FUNC_NUM 0x0