From 77509be2c8c3196075669a300954fda5a1ff28c2 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Thu, 22 Oct 2020 17:11:22 +0200 Subject: soc/intel/xeon_sp: Configure DPR on all stacks Configure DPR to span the region between cbmem_top and TSEG base. This region was already unavailable to the OS. Change-Id: Ia0d34e50b3d577f19172619156352534f740ea6b Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/c/coreboot/+/46818 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h | 1 + 1 file changed, 1 insertion(+) (limited to 'src/soc/intel/xeon_sp/skx') diff --git a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h index 353955566b..ce223cc2d4 100644 --- a/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h +++ b/src/soc/intel/xeon_sp/skx/include/soc/pci_devs.h @@ -128,6 +128,7 @@ #define HPET0_FUNC_NUM 0x00 #define MMAP_VTD_CFG_REG_DEVID 0x2024 +#define MMAP_VTD_STACK_CFG_REG_DEVID 0x2034 #define VTD_DEV_NUM 0x5 #define VTD_FUNC_NUM 0x0 -- cgit v1.2.3