diff options
| author | David Hendricks <ddaveh@amazon.com> | 2023-03-04 16:19:35 -0800 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-07 22:14:35 +0000 |
| commit | ea643a81a10d3d3d308ec3d734958193474f555d (patch) | |
| tree | fd34bb7a2076700e1808e1838c116dc5b98effb7 /src/soc/intel/xeon_sp/lbg/include | |
| parent | 35860ffabedb26b198a170bbcf1bc750610f6aac (diff) | |
soc/intel/xeon_sp: Add PM definition for SPR-SP
Change-Id: I13ed156a1b967e87fa30b1867feed03c3d17b992
Signed-off-by: Jonathan Zhang <jonzhang@meta.com>
Signed-off-by: David Hendricks <ddaveh@amazon.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72613
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jonathan Zhang <jon.zhixiong.zhang@gmail.com>
Diffstat (limited to 'src/soc/intel/xeon_sp/lbg/include')
| -rw-r--r-- | src/soc/intel/xeon_sp/lbg/include/soc/soc_pm.h | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/lbg/include/soc/soc_pm.h b/src/soc/intel/xeon_sp/lbg/include/soc/soc_pm.h new file mode 100644 index 0000000000..2e309b5928 --- /dev/null +++ b/src/soc/intel/xeon_sp/lbg/include/soc/soc_pm.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: GPL-2.0-or-later */ + +#ifndef _SOC_LBG_PM_H_ +#define _SOC_LBG_PM_H_ + +#define GPE0_STS(x) (0x80 + ((x) * 4)) +#define GPE0_EN(x) (0x90 + ((x) * 4)) + +/* This is defined as ETR3 in EDS. We named it as ETR here for consistency */ +#define ETR 0xac +#define PRSTS 0x10 + +#endif /* _SOC_LBG_PM_H_ */ |