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authorMarc Jones <marcjones@sysproconsulting.com>2021-03-18 17:01:06 -0600
committerPatrick Georgi <pgeorgi@google.com>2021-04-16 06:56:05 +0000
commit352ca5b0313c514b438c4aa518be905a6eff001f (patch)
treedd7848933ae0a36ec5233bf6bc233d747703a090 /src/soc/intel/xeon_sp/cpx/include
parent051bf5d3324f529cf8f4616918b78de634fdf944 (diff)
soc/intel/xeon_sp: Call SMM finalize
Call the SMM finalize SMI. Adds SMM_FEATURE_CONTROL setting to enable MCHK on code fetch outside SMRR and the register lock as recommended by the BWG. Change-Id: Ie3b58d35c7a62509e39e393514012d1055232d32 Signed-off-by: Marc Jones <marcjones@sysproconsulting.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/51651 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Rocky Phagura Reviewed-by: Jay Talbott <JayTalbott@sysproconsulting.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/xeon_sp/cpx/include')
-rw-r--r--src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h17
1 files changed, 17 insertions, 0 deletions
diff --git a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
index f29991de0e..122a376c4e 100644
--- a/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
+++ b/src/soc/intel/xeon_sp/cpx/include/soc/pci_devs.h
@@ -68,6 +68,23 @@
#define PCU_CR3_CONFIG_TDP_CONTROL 0x60
#define TDP_LOCK BIT(31)
+#if !defined(__SIMPLE_DEVICE__)
+#define _UBOX_DEV(func) pcidev_path_on_root_debug(PCI_DEVFN(UBOX_DEV, func), __func__)
+#else
+#define _UBOX_DEV(func) PCI_DEV(0, UBOX_DEV, func)
+#endif
+
+#define UBOX_DEV 8
+
+#define UBOX_PMON_BUS 0
+#define UBOX_PMON_DEV 8
+#define UBOX_PMON_FUNC 1
+#define UBOX_DEV_PMON _UBOX_DEV(UBOX_PMON_FUNC)
+#define SMM_FEATURE_CONTROL 0x7c
+#define SMM_CODE_CHK_EN BIT(2)
+#define SMM_FEATURE_CONTROL_LOCK BIT(0)
+
+
#define UBOX_DECS_BUS 0
#define UBOX_DECS_DEV 8
#define UBOX_DECS_FUNC 2