diff options
| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-03-12 01:15:43 -0700 |
|---|---|---|
| committer | Patrick Georgi <pgeorgi@google.com> | 2020-03-15 12:55:19 +0000 |
| commit | a6bff2d8ab4824a95221fda8a3b175c3f4337720 (patch) | |
| tree | bc535f3c4854497abb9cdcc33afb8a720e8b2ef1 /src/soc/intel/tigerlake/fsp_params_tgl.c | |
| parent | 4b9fa2d6ea6107cf0c94b116dfffa553075fcded (diff) | |
soc/intel/tigerlake: Enable CNVi through dev_enabled
Check for dev enabled status for CNVi and update the
UPD accordingly.
BUG=none
BRANCH=none
TEST=Build and boot tglrvp
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I15a03cc70f12e094badf942dd81f22bd09531051
Reviewed-on: https://review.coreboot.org/c/coreboot/+/39465
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Wonkyu Kim <wonkyu.kim@intel.com>
Reviewed-by: Nick Vaccaro <nvaccaro@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/fsp_params_tgl.c')
| -rw-r--r-- | src/soc/intel/tigerlake/fsp_params_tgl.c | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/src/soc/intel/tigerlake/fsp_params_tgl.c b/src/soc/intel/tigerlake/fsp_params_tgl.c index 7230a4c7e0..33abac4411 100644 --- a/src/soc/intel/tigerlake/fsp_params_tgl.c +++ b/src/soc/intel/tigerlake/fsp_params_tgl.c @@ -174,8 +174,11 @@ void platform_fsp_silicon_init_params_cb(FSPS_UPD *supd) params->PchLanEnable = dev->enabled; /* CNVi */ - params->CnviMode = config->CnviMode; - params->CnviBtCore = config->CnviBtCore; + dev = pcidev_path_on_root(PCH_DEVFN_CNVI_WIFI); + if (dev) + params->CnviMode = dev->enabled; + else + params->CnviMode = 0; /* Legacy 8254 timer support */ params->Enable8254ClockGating = !CONFIG_USE_LEGACY_8254_TIMER; |