diff options
| author | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-07-01 08:25:11 -0600 |
|---|---|---|
| committer | Tim Wawrzynczak <twawrzynczak@chromium.org> | 2021-09-10 21:54:01 +0000 |
| commit | 72d94026ce6ec2c6b363b70652e97c0041a70776 (patch) | |
| tree | 0395968e550d7d3df8ef7c5c008f4085b08656db /src/soc/intel/tigerlake/acpi/southbridge.asl | |
| parent | 90f9cbbfc4ae1f03028176b124c2be54e579fd3f (diff) | |
soc/intel/tigerlake: Switch to runtime generation of Intel Power Engine
The pep.asl file is being obsoleted by runtime generation, therefore
switch tigerlake boards to this method.
Signed-off-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Change-Id: I8e97c589273e934e89d69d8829680b9cac1ff9f5
Reviewed-on: https://review.coreboot.org/c/coreboot/+/56007
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Furquan Shaikh <furquan@google.com>
Diffstat (limited to 'src/soc/intel/tigerlake/acpi/southbridge.asl')
| -rw-r--r-- | src/soc/intel/tigerlake/acpi/southbridge.asl | 3 |
1 files changed, 0 insertions, 3 deletions
diff --git a/src/soc/intel/tigerlake/acpi/southbridge.asl b/src/soc/intel/tigerlake/acpi/southbridge.asl index 3d718b2ccb..83453e2633 100644 --- a/src/soc/intel/tigerlake/acpi/southbridge.asl +++ b/src/soc/intel/tigerlake/acpi/southbridge.asl @@ -42,8 +42,5 @@ /* PCI _OSC */ #include <soc/intel/common/acpi/pci_osc.asl> -/* Intel Power Engine Plug-in */ -#include <soc/intel/common/block/acpi/acpi/pep.asl> - /* GbE 0:1f.6 */ #include <soc/intel/common/block/acpi/acpi/pch_glan.asl> |