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author | Sean Rhodes <sean@starlabs.systems> | 2022-05-19 22:12:46 +0100 |
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committer | Felix Held <felix-coreboot@felixheld.de> | 2022-06-21 12:30:46 +0000 |
commit | 600856dec27dcb32687c8d0098a92822024c7f2c (patch) | |
tree | 3abacdc2827a7895934d118badfcd11cb4921f69 /src/soc/intel/elkhartlake/meminit.c | |
parent | 664f0c51e75f4ee168f28e549bb45782c0473d2e (diff) |
mb/starlabs/lite/{glk/glkr}: Disable Sata Port 1
Disable Sata Port 1 as it is not used.
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Change-Id: I93ecdaba5d1ce96ddcf3695edd7fb109054743e9
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64534
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
Diffstat (limited to 'src/soc/intel/elkhartlake/meminit.c')
0 files changed, 0 insertions, 0 deletions