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authorFelix Held <felix.held@amd.corp-partner.google.com>2021-10-21 02:13:36 +0200
committerFelix Held <felix-coreboot@felixheld.de>2021-10-22 14:59:08 +0000
commitaf2da558763ef9ec7a888cdd56b6a536c8299c89 (patch)
tree15f9c5d4a39b800bb0475b0e401c40752795e7a7 /src/soc/intel/denverton_ns/chip.c
parent60e9114c621095285314cc530016d7930b327f34 (diff)
soc/intel/denverton_ns: use mp_cpu_bus_init
After adding the functionality to add a bus/link on the CPU cluster device in mp_cpu_bus_init if it is missing due to no LAPIC device being present in the devicetree below the CPU cluster device, we can use mp_cpu_bus_init as init function in cpu_bus_ops and implement mp_init_cpus. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I76aebeca1b3227cfd310b6c45f506c042b35ae04 Reviewed-on: https://review.coreboot.org/c/coreboot/+/58509 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/intel/denverton_ns/chip.c')
-rw-r--r--src/soc/intel/denverton_ns/chip.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 6a873530f6..c594a6f5f2 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -27,7 +27,7 @@ static struct device_operations pci_domain_ops = {
static struct device_operations cpu_bus_ops = {
.read_resources = noop_read_resources,
.set_resources = noop_set_resources,
- .init = denverton_init_cpus,
+ .init = mp_cpu_bus_init,
#if CONFIG(HAVE_ACPI_TABLES)
.acpi_fill_ssdt = generate_cpu_entries,
#endif