4 files changed, 3 insertions, 18 deletions
diff --git a/src/soc/intel/denverton_ns/chip.c b/src/soc/intel/denverton_ns/chip.c
index 6a873530f6..c594a6f5f2 100644
--- a/src/soc/intel/denverton_ns/chip.c
+++ b/src/soc/intel/denverton_ns/chip.c
@@ -27,7 +27,7 @@ static struct device_operations pci_domain_ops = {
 static struct device_operations cpu_bus_ops = {
 	.read_resources = noop_read_resources,
 	.set_resources = noop_set_resources,
-	.init = denverton_init_cpus,
+	.init = mp_cpu_bus_init,
 #if CONFIG(HAVE_ACPI_TABLES)
 	.acpi_fill_ssdt = generate_cpu_entries,
 #endif
diff --git a/src/soc/intel/denverton_ns/cpu.c b/src/soc/intel/denverton_ns/cpu.c
index d856692721..44cb297c6a 100644
--- a/src/soc/intel/denverton_ns/cpu.c
+++ b/src/soc/intel/denverton_ns/cpu.c
@@ -286,17 +286,9 @@ static const struct mp_ops mp_ops = {
 	.post_mp_init = post_mp_init,
 };
 
-void denverton_init_cpus(struct device *dev)
+void mp_init_cpus(struct bus *cpu_bus)
 {
-	/*
-	 * Ensure there is at least one bus downstream to the CPU device. If not, then create a
-	 * new link. This can occur if the mainboard does not add any APIC device in the device
-	 * tree.
-	 */
-	if (!dev->link_list)
-		add_more_links(dev, 1);
-
 	/* Clear for take-off */
 	/* TODO: Handle mp_init_with_smm failure? */
-	mp_init_with_smm(dev->link_list, &mp_ops);
+	mp_init_with_smm(cpu_bus, &mp_ops);
 }
diff --git a/src/soc/intel/denverton_ns/include/soc/cpu.h b/src/soc/intel/denverton_ns/include/soc/cpu.h
index f4b0d3c42a..a714764767 100644
--- a/src/soc/intel/denverton_ns/include/soc/cpu.h
+++ b/src/soc/intel/denverton_ns/include/soc/cpu.h
@@ -7,12 +7,6 @@
 
 int get_cpu_count(void);
 
-#ifndef __ASSEMBLER__
-#include <device/device.h>
-
-void denverton_init_cpus(struct device *dev);
-#endif
-
 /* Everything below this line is ignored in the DSDT */
 #ifndef __ACPI__
 
diff --git a/src/soc/intel/denverton_ns/include/soc/ramstage.h b/src/soc/intel/denverton_ns/include/soc/ramstage.h
index 353d82daeb..c204849c11 100644
--- a/src/soc/intel/denverton_ns/include/soc/ramstage.h
+++ b/src/soc/intel/denverton_ns/include/soc/ramstage.h
@@ -8,7 +8,6 @@
 #include <fsp/util.h>
 #include <memory_info.h>
 
-void denverton_init_cpus(struct device *dev);
 void mainboard_silicon_init_params(FSPS_UPD *params);
 void southcluster_enable_dev(struct device *dev);
 void mainboard_add_dimm_info(struct memory_info *mem_info, int channel,