diff options
| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-12 23:07:52 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 13:54:30 +0000 |
| commit | cde4f3b2790d52ef38106c7ba91eea5d53e03a93 (patch) | |
| tree | 72d65b1474c3115d336fae45d6a5990638dfaaef /src/soc/intel/common | |
| parent | a52b93b262582009decf924dbdde9bc1bf856ddb (diff) | |
acpi/gnvs.c: Drop unused pointer to the cbmem console
Change-Id: I7e2018dbccead15fcd84e34df8207120d3a0c57c
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64303
Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Reviewed-by: Tim Wawrzynczak <inforichland@gmail.com>
Diffstat (limited to 'src/soc/intel/common')
| -rw-r--r-- | src/soc/intel/common/block/acpi/acpi/globalnvs.asl | 2 | ||||
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/nvs.h | 2 |
2 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl index 2c72b7d2ac..adda519e90 100644 --- a/src/soc/intel/common/block/acpi/acpi/globalnvs.asl +++ b/src/soc/intel/common/block/acpi/acpi/globalnvs.asl @@ -12,7 +12,7 @@ Field (GNVS, ByteAcc, NoLock, Preserve) TLVL, 8, // 0x05 - Throttle Level Limit LIDS, 8, // 0x06 - LID State , 8, // 0x07 - AC Power State - CBMC, 32, // 0x08 - 0x0b AC Power State + , 32, // 0x08 - 0x0b AC Power State PM1I, 64, // 0x0c - 0x13 PM1 wake status bit GPEI, 64, // 0x14 - 0x17 GPE wake status bit DPTE, 8, // 0x1c - Enable DPTF diff --git a/src/soc/intel/common/block/include/intelblocks/nvs.h b/src/soc/intel/common/block/include/intelblocks/nvs.h index 4fc5b4c4c8..071be665ea 100644 --- a/src/soc/intel/common/block/include/intelblocks/nvs.h +++ b/src/soc/intel/common/block/include/intelblocks/nvs.h @@ -14,7 +14,7 @@ struct __packed global_nvs { u8 tlvl; /* 0x05 - Throttle Level Limit */ u8 lids; /* 0x06 - LID State */ u8 unused_was_pwrs; /* 0x07 - AC Power State */ - u32 cbmc; /* 0x08 - 0xb coreboot Memory Console */ + u32 unused_was_cbmc; /* 0x08 - 0xb coreboot Memory Console */ u64 pm1i; /* 0x0c - 0x13 PM1 wake status bit */ u64 gpei; /* 0x14 - 0x1b GPE wake status bit */ u8 dpte; /* 0x1c - Enable DPTF */ |