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| author | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-06 12:10:39 +0200 |
|---|---|---|
| committer | Arthur Heymans <arthur@aheymans.xyz> | 2022-05-13 10:56:42 +0000 |
| commit | 022d235a1e2f118814fc0f21ef6689c6eb958dbe (patch) | |
| tree | 051797a193ac6794f4538acb7acf81504269e241 /src/soc/intel/common/tpm_tis.c | |
| parent | 7066f1575ee34e11fd51e49f64316bdfcda0f7d4 (diff) | |
nb/intel/gm45: Allow for PCI BARs above 4G
Linux needs to know that allocating BARs above 4G is fine so reserve a
region in ACPI for that.
Tested on thinkpad X200: a PCIe window gets allocated above 4G and
Linux does not relocate it.
Change-Id: I62a8a656481eba01add3d7d06b42e3352206df1b
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/64094
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Nico Huber <nico.h@gmx.de>
Diffstat (limited to 'src/soc/intel/common/tpm_tis.c')
0 files changed, 0 insertions, 0 deletions