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| author | Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com> | 2020-11-25 01:07:06 -0800 |
|---|---|---|
| committer | Furquan Shaikh <furquan@google.com> | 2020-12-08 22:56:31 +0000 |
| commit | 63afea54f41cb6054d8a3625238424e381a4fada (patch) | |
| tree | 1845bc50f96b62c0d3342ab785e4c911df399a18 /src/soc/intel/common/pch/Kconfig | |
| parent | 493937e1d67e734c2ac45f92280f2c2c22a50b85 (diff) | |
soc/intel/common/dmi: Add DMI driver support
This change allows configuring the General Purpose
Memory Range(GPMR) register in BIOS to set up the decoding in DMI.
This driver provides the following functionality:
1. Add a helper function dmi_enable_gpmr which takes as input base,
limit and destination ID to configure in general purpose memory range
registers and then set the GPMR registers in the next available
free GMPR and enable the decoding.
2. Add helper function get_available_gpmr which returns available free
GPMR.
3. This helper function can be utilized by the fast SPI driver to
configure the window for the extended BIOS region.
BUG=b:171534504
Signed-off-by: Srinidhi N Kaushik <srinidhi.n.kaushik@intel.com>
Change-Id: I34a894e295ecb98fbc4a81282361e851c436a403
Reviewed-on: https://review.coreboot.org/c/coreboot/+/47988
Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/pch/Kconfig')
| -rw-r--r-- | src/soc/intel/common/pch/Kconfig | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/src/soc/intel/common/pch/Kconfig b/src/soc/intel/common/pch/Kconfig index cca65d6b2a..b00fc8bb71 100644 --- a/src/soc/intel/common/pch/Kconfig +++ b/src/soc/intel/common/pch/Kconfig @@ -19,6 +19,7 @@ config PCH_SPECIFIC_OPTIONS select SOC_INTEL_COMMON_BLOCK_CHIP_CONFIG select SOC_INTEL_COMMON_BLOCK_CSE select SOC_INTEL_COMMON_BLOCK_DSP + select SOC_INTEL_COMMON_BLOCK_DMI select SOC_INTEL_COMMON_BLOCK_FAST_SPI select SOC_INTEL_COMMON_BLOCK_GPIO select SOC_INTEL_COMMON_BLOCK_GPIO_ITSS_POL_CFG |