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authorFelix Held <felix-coreboot@felixheld.de>2024-02-06 16:55:29 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-23 15:13:37 +0000
commit0d19289e840f9c711f50a74437d1b3856222db03 (patch)
treeca4e8ce2d51dfa9d10deceb28393a28c061a0952 /src/soc/intel/common/block/lpc
parenta138cfb422109018ba35c8f5d82621717eaf0611 (diff)
arch/x86/ioapic: use uintptr_t for IOAPIC base address
Use uintptr_t for the IOAPIC base parameter of the various IOAPIC- related functions to avoid needing type casts in the callers. This also allows dropping the VIO_APIC_VADDR define and consistently use the IO_APIC_ADDR define instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I912943e923ff092708e90138caa5e1daf269a69f Reviewed-on: https://review.coreboot.org/c/coreboot/+/80358 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/soc/intel/common/block/lpc')
-rw-r--r--src/soc/intel/common/block/lpc/lpc_lib.c4
1 files changed, 2 insertions, 2 deletions
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index ed76049b6d..9a7165baaf 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -395,9 +395,9 @@ void lpc_disable_clkrun(void)
void pch_enable_ioapic(void)
{
/* affirm full set of redirection table entries ("write once") */
- ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
+ ioapic_set_max_vectors(IO_APIC_ADDR, PCH_REDIR_ETR);
- register_new_ioapic_gsi0((void *)IO_APIC_ADDR);
+ register_new_ioapic_gsi0(IO_APIC_ADDR);
}
static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {