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authorFelix Held <felix-coreboot@felixheld.de>2024-02-06 16:55:29 +0100
committerFelix Held <felix-coreboot@felixheld.de>2024-02-23 15:13:37 +0000
commit0d19289e840f9c711f50a74437d1b3856222db03 (patch)
treeca4e8ce2d51dfa9d10deceb28393a28c061a0952 /src/soc/intel
parenta138cfb422109018ba35c8f5d82621717eaf0611 (diff)
arch/x86/ioapic: use uintptr_t for IOAPIC base address
Use uintptr_t for the IOAPIC base parameter of the various IOAPIC- related functions to avoid needing type casts in the callers. This also allows dropping the VIO_APIC_VADDR define and consistently use the IO_APIC_ADDR define instead. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I912943e923ff092708e90138caa5e1daf269a69f Reviewed-on: https://review.coreboot.org/c/coreboot/+/80358 Reviewed-by: Elyes Haouas <ehaouas@noos.fr> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Jérémy Compostella <jeremy.compostella@intel.com>
Diffstat (limited to 'src/soc/intel')
-rw-r--r--src/soc/intel/broadwell/pch/lpc.c4
-rw-r--r--src/soc/intel/common/block/lpc/lpc_lib.c4
-rw-r--r--src/soc/intel/denverton_ns/lpc.c4
-rw-r--r--src/soc/intel/xeon_sp/uncore_acpi.c2
4 files changed, 7 insertions, 7 deletions
diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c
index 9aaca215b8..ecd66fa626 100644
--- a/src/soc/intel/broadwell/pch/lpc.c
+++ b/src/soc/intel/broadwell/pch/lpc.c
@@ -31,9 +31,9 @@ static void pch_enable_ioapic(struct device *dev)
/* affirm full set of redirection table entries ("write once") */
/* PCH-LP has 40 redirection entries */
- ioapic_set_max_vectors(VIO_APIC_VADDR, 40);
+ ioapic_set_max_vectors(IO_APIC_ADDR, 40);
- register_new_ioapic_gsi0(VIO_APIC_VADDR);
+ register_new_ioapic_gsi0(IO_APIC_ADDR);
}
#define ACPI_SCI_IRQ 9
diff --git a/src/soc/intel/common/block/lpc/lpc_lib.c b/src/soc/intel/common/block/lpc/lpc_lib.c
index ed76049b6d..9a7165baaf 100644
--- a/src/soc/intel/common/block/lpc/lpc_lib.c
+++ b/src/soc/intel/common/block/lpc/lpc_lib.c
@@ -395,9 +395,9 @@ void lpc_disable_clkrun(void)
void pch_enable_ioapic(void)
{
/* affirm full set of redirection table entries ("write once") */
- ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
+ ioapic_set_max_vectors(IO_APIC_ADDR, PCH_REDIR_ETR);
- register_new_ioapic_gsi0((void *)IO_APIC_ADDR);
+ register_new_ioapic_gsi0(IO_APIC_ADDR);
}
static const uint8_t pch_interrupt_routing[PIRQ_COUNT] = {
diff --git a/src/soc/intel/denverton_ns/lpc.c b/src/soc/intel/denverton_ns/lpc.c
index ae923d7c0e..7dc971ea92 100644
--- a/src/soc/intel/denverton_ns/lpc.c
+++ b/src/soc/intel/denverton_ns/lpc.c
@@ -32,9 +32,9 @@
static void pch_enable_ioapic(struct device *dev)
{
/* affirm full set of redirection table entries ("write once") */
- ioapic_set_max_vectors(VIO_APIC_VADDR, PCH_REDIR_ETR);
+ ioapic_set_max_vectors(IO_APIC_ADDR, PCH_REDIR_ETR);
- register_new_ioapic_gsi0((void *)IO_APIC_ADDR);
+ register_new_ioapic_gsi0(IO_APIC_ADDR);
}
/* interrupt router lookup for internal devices */
diff --git a/src/soc/intel/xeon_sp/uncore_acpi.c b/src/soc/intel/xeon_sp/uncore_acpi.c
index 5ee9087040..b4856120a7 100644
--- a/src/soc/intel/xeon_sp/uncore_acpi.c
+++ b/src/soc/intel/xeon_sp/uncore_acpi.c
@@ -283,7 +283,7 @@ static unsigned long acpi_create_drhd(unsigned long current, int socket,
if (socket == 0 && stack == IioStack0) {
union p2sb_bdf ioapic_bdf = p2sb_get_ioapic_bdf();
printk(BIOS_DEBUG, " [IOAPIC Device] Enumeration ID: 0x%x, PCI Bus Number: 0x%x, "
- "PCI Path: 0x%x, 0x%x\n", get_ioapic_id(VIO_APIC_VADDR), ioapic_bdf.bus,
+ "PCI Path: 0x%x, 0x%x\n", get_ioapic_id(IO_APIC_ADDR), ioapic_bdf.bus,
ioapic_bdf.dev, ioapic_bdf.fn);
current += acpi_create_dmar_ds_ioapic_from_hw(current,
IO_APIC_ADDR, ioapic_bdf.bus, ioapic_bdf.dev, ioapic_bdf.fn);