diff options
author | Krishna Prasad Bhat <krishna.p.bhat.d@intel.com> | 2023-07-18 21:49:17 +0530 |
---|---|---|
committer | Subrata Banik <subratabanik@google.com> | 2023-10-04 05:48:36 +0000 |
commit | 98fb5ffd6b934edd5be7c9ac753d2763dfbafba9 (patch) | |
tree | 1ba5a0f702ee3eae167d301ec929386313e14f67 /src/soc/intel/common/block/include | |
parent | 183092743b85533bdbd2e5a706980561786dbd34 (diff) |
soc/intel/cse: Implement APIs to access PSR backup status in CMOS
PSR data is created and stored in CSE data partition. In platforms that
employ CSE Lite SKU firmware, a firmware downgrade involves clearing of
CSE data partition which results in PSR data being lost. The PSR data
needs to be preserved across the firmware downgrade flow. CSE Lite SKU
firmware supports command to backup PSR data. Since firmware downgrade
and PSR data backup flows involve global resets, there is a need to
track the PSR data backup status across resets. So adding a CMOS
variable for the same.
This patch implements API to access PSR backup status stored in CMOS.
The get API allows to retrieve the PSR backup status from CMOS memory.
The update API allows to update the PSR backup status in CMOS.
BRANCH=None
BUG=b:273207144
TEST=Able to retrieve PSR backup status across resets.
Change-Id: I270894e3e08dd50ca88e5402b59c211d7e693d14
Signed-off-by: Krishna Prasad Bhat <krishna.p.bhat.d@intel.com>
Signed-off-by: Rizwan Qureshi <rizwan.qureshi@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/77069
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Diffstat (limited to 'src/soc/intel/common/block/include')
-rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cse.h | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cse.h b/src/soc/intel/common/block/include/intelblocks/cse.h index 0f7356854d..ebf20ed857 100644 --- a/src/soc/intel/common/block/include/intelblocks/cse.h +++ b/src/soc/intel/common/block/include/intelblocks/cse.h @@ -167,6 +167,18 @@ struct cse_specific_info { uint32_t crc; }; +/* PSR backup status */ +enum psr_backup_state { + PSR_BACKUP_DONE = 0, + PSR_BACKUP_PENDING = 1, +}; + +struct psr_backup_status { + uint32_t signature; + int8_t value; + uint16_t checksum; +}; + /* CSE RX and TX error status */ enum cse_tx_rx_status { /* |