diff options
| author | Sean Rhodes <sean@starlabs.systems> | 2024-07-18 20:08:26 +0100 |
|---|---|---|
| committer | Sean Rhodes <sean@starlabs.systems> | 2024-10-11 08:31:37 +0000 |
| commit | 12abfb43dc0a9cbabdb60f04254fff04bf14a8ce (patch) | |
| tree | 6417fd1d7c6d84b865f055aa77c4d4ec05760606 /src/soc/intel/common/block/include/intelblocks | |
| parent | 6e546cc695e7babb809d9555383d7c835bf045b8 (diff) | |
soc/intel/cnvi: Add CNVW OpRegion
The CNVi driver is relatively basic in coreboot and most
noticeably, recent Linux kernels flag that lack of a _PRR
method, which is used to reset WiFi and Bluetooth.
This patch series adds methods recommended by Intel in
document #559910.
This patch defines an OpRegion for CNVi, for both
integrated and dedicated solutions.
Change-Id: Idd2ff93fb65c40f656804d96966e1881202ccb56
Signed-off-by: Sean Rhodes <sean@starlabs.systems>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/83556
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@gmail.com>
Diffstat (limited to 'src/soc/intel/common/block/include/intelblocks')
| -rw-r--r-- | src/soc/intel/common/block/include/intelblocks/cnvi.h | 34 |
1 files changed, 34 insertions, 0 deletions
diff --git a/src/soc/intel/common/block/include/intelblocks/cnvi.h b/src/soc/intel/common/block/include/intelblocks/cnvi.h new file mode 100644 index 0000000000..fa96fdd37d --- /dev/null +++ b/src/soc/intel/common/block/include/intelblocks/cnvi.h @@ -0,0 +1,34 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef _SOC_INTEL_COMMON_CNVI_H_ +#define _SOC_INTEL_COMMON_CNVI_H_ + +/* CNVi WiFi Register */ +#define CNVI_DEV_CAP 0x44 +#define CNVI_DEV_CONTROL 0x48 +#define CNVI_POWER_STATUS 0xcc + +/* CNVi PLDR Results */ +#define CNVI_PLDR_COMPLETE 0x02 +#define CNVI_PLDR_NOT_COMPLETE 0x03 +#define CNVI_PLDR_TIMEOUT 0x04 + +/* CNVi PLDR Control */ +#if CONFIG(SOC_INTEL_ALDERLAKE_PCH_S) +#define CNVI_ABORT_PLDR 0x80 +#else +#define CNVI_ABORT_PLDR 0x44 +#endif + +#define CNVI_ABORT_ENABLE BIT(0) +#define CNVI_ABORT_REQUEST BIT(1) +#define CNVI_READY BIT(2) + +/* CNVi Sideband Port ID */ +#if CONFIG(SOC_INTEL_METEORLAKE) +#define CNVI_SIDEBAND_ID 0x29 +#else +#define CNVI_SIDEBAND_ID 0x73 +#endif + +#endif // _SOC_INTEL_COMMON_CNVI_H_ |