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author | Saurabh Mishra <mishra.saurabh@intel.com> | 2024-04-12 19:37:20 +0530 |
---|---|---|
committer | Martin L Roth <gaumless@gmail.com> | 2024-05-12 18:57:05 +0000 |
commit | 7f2020b7127a1f1a88c75a7bde11b24c9daec5a8 (patch) | |
tree | 0e3f284fed3b50ed7ceea56c3e4802dd7dc2abfb /src/soc/intel/common/block/gpio | |
parent | 83fd2d8a284c77bcb87007e62c4658b264983ff8 (diff) |
soc/intel/common: Add Lunar Lake CNVI device IDs
Without this patch, ACPI SSDT does not supports and lists CNVW.
With this patch, verified "CNVW" in ACPI SSDT listing.
Scope (\_SB.PCI0)
{
Device (CNVW)
{
Name (_ADR, 0x0000000000140003) // _ADR: Address
Method (_STA, 0, NotSerialized) // _STA: Status
{
Return (0x0F)
}
}
}
Reference:
Lunar Lake External Design Specification Volume 1 (734362)
BUG=b:329787286
TEST=verified on Lunar Lake RVP board (lnlrvp).
Change-Id: I5a0a3fbc9f43a6a573e33fcf3901055e10faaed1
Signed-off-by: Saurabh Mishra <mishra.saurabh@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/81846
Reviewed-by: Eric Lai <ericllai@google.com>
Reviewed-by: Subrata Banik <subratabanik@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/common/block/gpio')
0 files changed, 0 insertions, 0 deletions