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authorBarnali Sarkar <barnali.sarkar@intel.com>2017-06-05 20:01:14 +0530
committerAaron Durbin <adurbin@chromium.org>2017-06-09 19:27:14 +0200
commit9e55ff6a879ee6eb96988e52020c4c20a4898c4f (patch)
treea002c8c99a306cc25b0e8de5622af646aee76535 /src/soc/intel/apollolake/include
parentf004f66ca7b0c428c04d6025738319187cf911fe (diff)
soc/intel/apollolake: Rename ACPI Base Address and Size Macro
Rename these two Macros to help use Common Code - ACPI_PMIO_BASE --> ACPI_BASE_ADDRESS ACPI_PMIO_SIZE --> ACPI_BASE_SIZE Change-Id: I21125b7206c241692cfdf1cdb10b8b3dee62b24a Signed-off-by: Barnali Sarkar <barnali.sarkar@intel.com> Reviewed-on: https://review.coreboot.org/20038 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/include')
-rw-r--r--src/soc/intel/apollolake/include/soc/iomap.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/src/soc/intel/apollolake/include/soc/iomap.h b/src/soc/intel/apollolake/include/soc/iomap.h
index 0b52095879..a8e4bc9bc5 100644
--- a/src/soc/intel/apollolake/include/soc/iomap.h
+++ b/src/soc/intel/apollolake/include/soc/iomap.h
@@ -25,14 +25,14 @@
#define MCH_BASE_ADDRESS 0xfed10000
#define MCH_BASE_SIZE (32 * KiB)
-#define ACPI_PMIO_BASE 0x400
-#define ACPI_PMIO_SIZE 0x100
+#define ACPI_BASE_ADDRESS 0x400
+#define ACPI_BASE_SIZE 0x100
#define R_ACPI_PM1_TMR 0x8
/* CST Range (R/W) IO port block size */
#define PMG_IO_BASE_CST_RNG_BLK_SIZE 0x5
/* ACPI PMIO Offset to C-state register*/
-#define ACPI_PMIO_CST_REG (ACPI_PMIO_BASE + 0x14)
+#define ACPI_PMIO_CST_REG (ACPI_BASE_ADDRESS + 0x14)
/* Accesses to these BARs are hardcoded in FSP */
#define PMC_BAR0 0xfe042000