diff options
| author | Mario Scheithauer <mario.scheithauer@siemens.com> | 2023-06-15 14:28:47 +0200 |
|---|---|---|
| committer | Jakub Czapiga <jacz@semihalf.com> | 2023-06-19 11:09:36 +0000 |
| commit | 16d1eb68d2e8c72a9ce1bca59cde21cd58452e66 (patch) | |
| tree | 4cbdcd59bb341f1529b8d02f959f94fe41d32fd9 /src/soc/intel/apollolake/chip.c | |
| parent | feafddba8ed6961237e39debf2361f20a1bcf635 (diff) | |
soc/intel/apollolake: Switch to snake case for ModPhyIfValue
For a unification of the naming convension, change from pascal case to
snake case style for parameter 'ModPhyIfValue'.
Change-Id: I4cdf68e65cea4ab316af969cd6a8d096b456518d
Signed-off-by: Mario Scheithauer <mario.scheithauer@siemens.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/75855
Reviewed-by: Felix Singer <service+coreboot-gerrit@felixsinger.de>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/apollolake/chip.c')
| -rw-r--r-- | src/soc/intel/apollolake/chip.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index e3bfa1e273..a29ba3b19f 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -612,7 +612,7 @@ static void glk_fsp_silicon_init_params_cb( /* * Options to change USB3 ModPhy setting for Integrated Filter value. */ - silconfig->ModPhyIfValue = cfg->ModPhyIfValue; + silconfig->ModPhyIfValue = cfg->mod_phy_if_value; /* * Options to bump USB3 LDO voltage with 40mv. |