diff options
| author | Vinod Polimera <quic_vpolimer@quicinc.com> | 2023-02-03 10:59:56 +0530 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-02-13 12:38:19 +0000 |
| commit | 50bdc61cff97dd66dfc05054d0152803090c13ed (patch) | |
| tree | 27061f0cf30090e2ee64134ba277d2e3e04f0895 /src/soc/intel/alderlake/pcie_rp.c | |
| parent | a21df149249d5ad7099d74a8e523119b493c3d44 (diff) | |
soc/qualcomm/sc7280: Add support to configure 6bit color depth
Some of the eDp panels use 6bit color depth as default.
Set the default color depth configuration to 6 bit when there
is no match with the supported color depths.
BUG=b:255870643
TEST=Validated on sc7280 Zombie development board
Change-Id: I2cea10ad417a05f020e4c418f15212fee06a2369
Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/72744
Reviewed-by: Shelley Chen <shchen@google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/intel/alderlake/pcie_rp.c')
0 files changed, 0 insertions, 0 deletions