aboutsummaryrefslogtreecommitdiff
path: root/src/soc
diff options
context:
space:
mode:
authorVinod Polimera <quic_vpolimer@quicinc.com>2023-02-03 10:59:56 +0530
committerFelix Held <felix-coreboot@felixheld.de>2023-02-13 12:38:19 +0000
commit50bdc61cff97dd66dfc05054d0152803090c13ed (patch)
tree27061f0cf30090e2ee64134ba277d2e3e04f0895 /src/soc
parenta21df149249d5ad7099d74a8e523119b493c3d44 (diff)
soc/qualcomm/sc7280: Add support to configure 6bit color depth
Some of the eDp panels use 6bit color depth as default. Set the default color depth configuration to 6 bit when there is no match with the supported color depths. BUG=b:255870643 TEST=Validated on sc7280 Zombie development board Change-Id: I2cea10ad417a05f020e4c418f15212fee06a2369 Signed-off-by: Vinod Polimera <quic_vpolimer@quicinc.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/72744 Reviewed-by: Shelley Chen <shchen@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc')
-rw-r--r--src/soc/qualcomm/sc7280/display/edp_ctrl.c5
1 files changed, 4 insertions, 1 deletions
diff --git a/src/soc/qualcomm/sc7280/display/edp_ctrl.c b/src/soc/qualcomm/sc7280/display/edp_ctrl.c
index 1455cace90..2b4f5618ef 100644
--- a/src/soc/qualcomm/sc7280/display/edp_ctrl.c
+++ b/src/soc/qualcomm/sc7280/display/edp_ctrl.c
@@ -493,6 +493,9 @@ static void edp_config_ctrl(struct edp_ctrl *ctrl, uint8_t *dpcd)
depth = EDP_12BIT;
else if (ctrl->color_depth == 16)
depth = EDP_16BIT;
+ else
+ depth = EDP_6BIT;
+
config |= depth << EDP_CONFIGURATION_CTRL_BPC_SHIFT;
/* Num of Lanes */
@@ -895,7 +898,7 @@ static int edp_do_link_train(struct edp_ctrl *ctrl, uint8_t *dpcd)
static void edp_ctrl_config_misc(struct edp_ctrl *ctrl)
{
uint32_t misc_val;
- enum edp_color_depth depth = EDP_8BIT;
+ enum edp_color_depth depth = EDP_6BIT;
misc_val = read32(&edp_lclk->misc1_misc0);
if (ctrl->color_depth == 8)