summaryrefslogtreecommitdiff
path: root/src/soc/amd/sabrina/include
diff options
context:
space:
mode:
authorRaul E Rangel <rrangel@chromium.org>2022-02-24 11:54:32 -0700
committerFelix Held <felix-coreboot@felixheld.de>2022-03-02 21:09:40 +0000
commit409e5cb0f6c4c2374d88713deec8e39a1ce776f4 (patch)
treec9b631175503df93d1fcf9f78685133938cca67f /src/soc/amd/sabrina/include
parent89d6764fd58e407fe5eb59c76dc286ac04f0645b (diff)
soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume
We need to save the transfer buffer so we can transfer the cbmem console and timestamps into x86 DRAM. BUG=b:221231786 TEST=Boot guybrush and verify S0i3 resume works. Also dumped the transfer buffer from the OS and verified the console contents got transferred. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I1d3b34c90e0e18609b0c6a0cdedab35aeefbd84b Reviewed-on: https://review.coreboot.org/c/coreboot/+/62347 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc/amd/sabrina/include')
0 files changed, 0 insertions, 0 deletions