diff options
| author | Raul E Rangel <rrangel@chromium.org> | 2022-02-24 11:54:32 -0700 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2022-03-02 21:09:40 +0000 |
| commit | 409e5cb0f6c4c2374d88713deec8e39a1ce776f4 (patch) | |
| tree | c9b631175503df93d1fcf9f78685133938cca67f /src/soc | |
| parent | 89d6764fd58e407fe5eb59c76dc286ac04f0645b (diff) | |
soc/amd/common/psp_verstage: Save transfer buffer during S0i3 resume
We need to save the transfer buffer so we can transfer the cbmem
console and timestamps into x86 DRAM.
BUG=b:221231786
TEST=Boot guybrush and verify S0i3 resume works. Also dumped the
transfer buffer from the OS and verified the console contents got
transferred.
Signed-off-by: Raul E Rangel <rrangel@chromium.org>
Change-Id: I1d3b34c90e0e18609b0c6a0cdedab35aeefbd84b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/62347
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
Diffstat (limited to 'src/soc')
| -rw-r--r-- | src/soc/amd/common/psp_verstage/psp_verstage.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index 05f0cdac39..9d0fb2259a 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -252,6 +252,11 @@ void Main(void) if (bootmode == PSP_BOOT_MODE_S0i3_RESUME) { psp_verstage_s0i3_resume(); + post_code(POSTCODE_SAVE_BUFFERS); + retval = save_buffers(); + if (retval) + post_code(retval); + post_code(POSTCODE_UNMAP_FCH_DEVICES); unmap_fch_devices(); |