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authorKangheui Won <khwon@chromium.org>2021-05-20 10:02:00 +1000
committerFelix Held <felix-coreboot@felixheld.de>2021-05-28 16:16:28 +0000
commit9752725fe5d933943e77c9561c2f47110171d3ca (patch)
treea22e87728fc1e78c28cbe3d9997c01bae5b98243 /src/soc/amd/picasso
parent34d5f9130e40eab187ff8326503cc79803911b3a (diff)
soc/amd/picasso: fix MCACHE on psp_verstage RO boot
On RW boot path psp_verstage call cbfs_map which calls chain of _cbfs_alloc, cbfs_boot_lookup and cbfs_get_boot_device. Then cbfs_get_boot_device initializes MCACHE which is used later. However on RO boot path psp_verstage doesn't try to find anything in the CBFS which results RO MCACHE not to be initialized. Add cbfs_get_boot_device(true) to explicitly initialize MCACHE on recovery boot. BUG=b:177091575 BRANCH=none TEST=build and boot jelboz Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: I6c4b522fef5a4affd215faa122bdf6b53190cf3d Reviewed-on: https://review.coreboot.org/c/coreboot/+/54711 Reviewed-by: Julius Werner <jwerner@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/picasso')
-rw-r--r--src/soc/amd/picasso/Kconfig1
1 files changed, 0 insertions, 1 deletions
diff --git a/src/soc/amd/picasso/Kconfig b/src/soc/amd/picasso/Kconfig
index b93027734a..4bfd093d85 100644
--- a/src/soc/amd/picasso/Kconfig
+++ b/src/soc/amd/picasso/Kconfig
@@ -67,7 +67,6 @@ config CPU_SPECIFIC_OPTIONS
select FSP_COMPRESS_FSP_S_LZMA
select UDK_2017_BINDING
select HAVE_CF9_RESET
- select NO_CBFS_MCACHE if VBOOT_STARTS_BEFORE_BOOTBLOCK
config SOC_AMD_COMMON_BLOCK_UCODE_SIZE
default 3200