diff options
author | Felix Held <felix-coreboot@felixheld.de> | 2023-07-06 16:36:41 +0200 |
---|---|---|
committer | Felix Held <felix-coreboot@felixheld.de> | 2023-07-07 14:49:42 +0000 |
commit | f3180f07b55dfe29938d2883d9a98a529fe9ef1a (patch) | |
tree | 5e00db3f1984230eee05d8f76fc33474f5520efe /src/soc/amd/picasso/include | |
parent | 8f4b015759cf6189d8f942d7c06bea6a42a06c54 (diff) |
soc/amd/*/globalnvs,nvs: remove deprecated & unused CBMC field from GNVS
Commit cde4f3b2790d ("acpi/gnvs.c: Drop unused pointer to the cbmem
console") removed writing the coreboot memory console pointer to the
GNVS and kept the CBMC field as reserved. Since those fields aren't
needed any more and there are no dependencies on the absolute position
of the different fields in GNVS as long as both GNVS definitions on the
C and the ASL side match, remove the deprecated and unused CBMC field
from the GNVS structs.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iadfaf5a4ec1401b027dbfb6a7c6ce74a1dcecdfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76351
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>
Diffstat (limited to 'src/soc/amd/picasso/include')
-rw-r--r-- | src/soc/amd/picasso/include/soc/nvs.h | 11 |
1 files changed, 5 insertions, 6 deletions
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h index 12cff4b652..f975602f20 100644 --- a/src/soc/amd/picasso/include/soc/nvs.h +++ b/src/soc/amd/picasso/include/soc/nvs.h @@ -14,12 +14,11 @@ struct __packed global_nvs { /* Miscellaneous */ - uint32_t unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */ - uint64_t pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */ - uint64_t gpei; /* 0x0c - 0x13 - GPE Wake Source */ - uint8_t tmps; /* 0x14 - Temperature Sensor ID */ - uint8_t tcrt; /* 0x15 - Critical Threshold */ - uint8_t tpsv; /* 0x16 - Passive Threshold */ + uint64_t pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */ + uint64_t gpei; /* 0x08 - 0x0f - GPE Wake Source */ + uint8_t tmps; /* 0x10 - Temperature Sensor ID */ + uint8_t tcrt; /* 0x11 - Critical Threshold */ + uint8_t tpsv; /* 0x12 - Passive Threshold */ }; #endif /* AMD_PICASSO_NVS_H */ |