soc/amd/*/globalnvs,nvs: remove deprecated & unused CBMC field from GNVS

Commit cde4f3b2790d ("acpi/gnvs.c: Drop unused pointer to the cbmem
console") removed writing the coreboot memory console pointer to the
GNVS and kept the CBMC field as reserved. Since those fields aren't
needed any more and there are no dependencies on the absolute position
of the different fields in GNVS as long as both GNVS definitions on the
C and the ASL side match, remove the deprecated and unused CBMC field
from the GNVS structs.

Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: Iadfaf5a4ec1401b027dbfb6a7c6ce74a1dcecdfa
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76351
Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Elyes Haouas <ehaouas@noos.fr>

12 files changed, 37 insertions, 49 deletions

diff --git a/src/soc/amd/cezanne/acpi/globalnvs.asl b/src/soc/amd/cezanne/acpi/globalnvs.asl
index 352bc71085..3c1788747b 100644
--- a/src/soc/amd/cezanne/acpi/globalnvs.asl
+++ b/src/soc/amd/cezanne/acpi/globalnvs.asl
@@ -8,7 +8,6 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
 }
diff --git a/src/soc/amd/cezanne/include/soc/nvs.h b/src/soc/amd/cezanne/include/soc/nvs.h
index 1d98070de2..5edb878684 100644
--- a/src/soc/amd/cezanne/include/soc/nvs.h
+++ b/src/soc/amd/cezanne/include/soc/nvs.h
@@ -13,9 +13,8 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
 };
 
 #endif /* AMD_CEZANNE_NVS_H */
diff --git a/src/soc/amd/glinda/acpi/globalnvs.asl b/src/soc/amd/glinda/acpi/globalnvs.asl
index 0e3929d4a9..6a3d04e220 100644
--- a/src/soc/amd/glinda/acpi/globalnvs.asl
+++ b/src/soc/amd/glinda/acpi/globalnvs.asl
@@ -8,7 +8,6 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
 }
diff --git a/src/soc/amd/glinda/include/soc/nvs.h b/src/soc/amd/glinda/include/soc/nvs.h
index 2b1d17bce8..efe5dded87 100644
--- a/src/soc/amd/glinda/include/soc/nvs.h
+++ b/src/soc/amd/glinda/include/soc/nvs.h
@@ -13,9 +13,8 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
 };
 
 #endif /* AMD_GLINDA_NVS_H */
diff --git a/src/soc/amd/mendocino/acpi/globalnvs.asl b/src/soc/amd/mendocino/acpi/globalnvs.asl
index 7d1774da97..1e2e05c6a8 100644
--- a/src/soc/amd/mendocino/acpi/globalnvs.asl
+++ b/src/soc/amd/mendocino/acpi/globalnvs.asl
@@ -8,7 +8,6 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
 }
diff --git a/src/soc/amd/mendocino/include/soc/nvs.h b/src/soc/amd/mendocino/include/soc/nvs.h
index 3d50e084d9..f93d590ebc 100644
--- a/src/soc/amd/mendocino/include/soc/nvs.h
+++ b/src/soc/amd/mendocino/include/soc/nvs.h
@@ -13,9 +13,8 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
 };
 
 #endif /* AMD_MENDOCINO_NVS_H */
diff --git a/src/soc/amd/phoenix/acpi/globalnvs.asl b/src/soc/amd/phoenix/acpi/globalnvs.asl
index 13f01e5f3a..b2f3cf486d 100644
--- a/src/soc/amd/phoenix/acpi/globalnvs.asl
+++ b/src/soc/amd/phoenix/acpi/globalnvs.asl
@@ -8,7 +8,6 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
 }
diff --git a/src/soc/amd/phoenix/include/soc/nvs.h b/src/soc/amd/phoenix/include/soc/nvs.h
index 6e0de9e4ba..a1cff3923d 100644
--- a/src/soc/amd/phoenix/include/soc/nvs.h
+++ b/src/soc/amd/phoenix/include/soc/nvs.h
@@ -13,9 +13,8 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
 };
 
 #endif /* AMD_PHOENIX_NVS_H */
diff --git a/src/soc/amd/picasso/acpi/globalnvs.asl b/src/soc/amd/picasso/acpi/globalnvs.asl
index c322a4c18c..b36610e010 100644
--- a/src/soc/amd/picasso/acpi/globalnvs.asl
+++ b/src/soc/amd/picasso/acpi/globalnvs.asl
@@ -9,10 +9,9 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
-	TMPS,	8,	// 0x14 - Temperature Sensor ID
-	TCRT,	8,	// 0x15 - Critical Threshold
-	TPSV,	8,	// 0x16 - Passive Threshold
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
+	TMPS,	8,	// 0x10 - Temperature Sensor ID
+	TCRT,	8,	// 0x11 - Critical Threshold
+	TPSV,	8,	// 0x12 - Passive Threshold
 }
diff --git a/src/soc/amd/picasso/include/soc/nvs.h b/src/soc/amd/picasso/include/soc/nvs.h
index 12cff4b652..f975602f20 100644
--- a/src/soc/amd/picasso/include/soc/nvs.h
+++ b/src/soc/amd/picasso/include/soc/nvs.h
@@ -14,12 +14,11 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
-	uint8_t		tmps; /* 0x14 - Temperature Sensor ID */
-	uint8_t		tcrt; /* 0x15 - Critical Threshold */
-	uint8_t		tpsv; /* 0x16 - Passive Threshold */
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
+	uint8_t		tmps; /* 0x10 - Temperature Sensor ID */
+	uint8_t		tcrt; /* 0x11 - Critical Threshold */
+	uint8_t		tpsv; /* 0x12 - Passive Threshold */
 };
 
 #endif /* AMD_PICASSO_NVS_H */
diff --git a/src/soc/amd/stoneyridge/acpi/globalnvs.asl b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
index 0c1c4d1f3c..40ec742034 100644
--- a/src/soc/amd/stoneyridge/acpi/globalnvs.asl
+++ b/src/soc/amd/stoneyridge/acpi/globalnvs.asl
@@ -9,12 +9,11 @@
 Field (GNVS, ByteAcc, NoLock, Preserve)
 {
 	/* Miscellaneous */
-	,	32,	// 0x00 - 0x03 - coreboot Memory Console
-	PM1I,	64,	// 0x04 - 0x0b - System Wake Source - PM1 Index
-	GPEI,	64,	// 0x0c - 0x13 - GPE Wake Source
-	TMPS,	8,	// 0x14 - Temperature Sensor ID
-	TCRT,	8,	// 0x15 - Critical Threshold
-	TPSV,	8,	// 0x16 - Passive Threshold
+	PM1I,	64,	// 0x00 - 0x07 - System Wake Source - PM1 Index
+	GPEI,	64,	// 0x08 - 0x0f - GPE Wake Source
+	TMPS,	8,	// 0x10 - Temperature Sensor ID
+	TCRT,	8,	// 0x11 - Critical Threshold
+	TPSV,	8,	// 0x12 - Passive Threshold
 	Offset (0x20),  // 0x20 - AOAC Device Enables
 	, 5,
 	IC0E,	1,	//        I2C0, 5
diff --git a/src/soc/amd/stoneyridge/include/soc/nvs.h b/src/soc/amd/stoneyridge/include/soc/nvs.h
index 226c9f6c2d..7f461d6b8d 100644
--- a/src/soc/amd/stoneyridge/include/soc/nvs.h
+++ b/src/soc/amd/stoneyridge/include/soc/nvs.h
@@ -14,13 +14,12 @@
 
 struct __packed global_nvs {
 	/* Miscellaneous */
-	uint32_t	unused_was_cbmc; /* 0x00 - 0x03 - coreboot Memory Console */
-	uint64_t	pm1i; /* 0x04 - 0x0b - System Wake Source - PM1 Index */
-	uint64_t	gpei; /* 0x0c - 0x13 - GPE Wake Source */
-	uint8_t		tmps; /* 0x14 - Temperature Sensor ID */
-	uint8_t		tcrt; /* 0x15 - Critical Threshold */
-	uint8_t		tpsv; /* 0x16 - Passive Threshold */
-	uint8_t		pad1[9];
+	uint64_t	pm1i; /* 0x00 - 0x07 - System Wake Source - PM1 Index */
+	uint64_t	gpei; /* 0x08 - 0x0f - GPE Wake Source */
+	uint8_t		tmps; /* 0x10 - Temperature Sensor ID */
+	uint8_t		tcrt; /* 0x11 - Critical Threshold */
+	uint8_t		tpsv; /* 0x12 - Passive Threshold */
+	uint8_t		pad1[13];
 	aoac_devs_t	aoac; /* 0x20 - AOAC device enables */
 	uint16_t	fw00; /* 0x24 - XhciFwRomAddr_Rom, Boot RAM */
 	uint16_t	fw02; /* 0x26 - XhciFwRomAddr_Ram, Instr RAM */