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authorMartin Roth <martin.roth@amd.corp-partner.google.com>2022-10-06 15:57:21 -0600
committerMartin Roth <martin.roth@amd.corp-partner.google.com>2022-10-10 21:48:30 +0000
commit1a3de8e5bcc5c83934fa2a690e125b843e8b01ab (patch)
tree0df3332114bde60848c018a9b5de245a9568ba4a /src/soc/amd/morgana/espi_util.c
parent134908381f2b25063558f2ce1414fa70243c9c55 (diff)
soc/amd/morgana: Add initial commit for new SoC
This is an initial framework for the Morgana SoC. TODOs have been added to the files for both customization and commonization. Signed-off-by: Martin Roth <martin.roth@amd.corp-partner.google.com> Change-Id: If92e129db10d41595e1dc18a7c1dfe99d57790cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/68195 Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/morgana/espi_util.c')
-rw-r--r--src/soc/amd/morgana/espi_util.c22
1 files changed, 22 insertions, 0 deletions
diff --git a/src/soc/amd/morgana/espi_util.c b/src/soc/amd/morgana/espi_util.c
new file mode 100644
index 0000000000..1d0fc1731a
--- /dev/null
+++ b/src/soc/amd/morgana/espi_util.c
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+/* TODO: Update for Morgana */
+
+#include <amdblocks/spi.h>
+#include <soc/espi.h>
+#include <types.h>
+
+#define ESPI_CNTRL_REGISTER 0x10
+#define LOCK_SPIX10_BIT2 BIT(3)
+#define ESPI_MUX_SPI1 BIT(2)
+#define ROM_ADDR_WR_PROT BIT(1)
+#define DIS_ESPI_MASCTL_REG_WR BIT(0)
+
+void espi_switch_to_spi1_pads(void)
+{
+ uint8_t reg = spi_read8(ESPI_CNTRL_REGISTER);
+
+ reg |= ESPI_MUX_SPI1;
+
+ spi_write8(ESPI_CNTRL_REGISTER, reg);
+}