From 1a3de8e5bcc5c83934fa2a690e125b843e8b01ab Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Thu, 6 Oct 2022 15:57:21 -0600 Subject: soc/amd/morgana: Add initial commit for new SoC This is an initial framework for the Morgana SoC. TODOs have been added to the files for both customization and commonization. Signed-off-by: Martin Roth Change-Id: If92e129db10d41595e1dc18a7c1dfe99d57790cc Reviewed-on: https://review.coreboot.org/c/coreboot/+/68195 Reviewed-by: Fred Reitberger Reviewed-by: Marshall Dawson Tested-by: build bot (Jenkins) --- src/soc/amd/morgana/espi_util.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) create mode 100644 src/soc/amd/morgana/espi_util.c (limited to 'src/soc/amd/morgana/espi_util.c') diff --git a/src/soc/amd/morgana/espi_util.c b/src/soc/amd/morgana/espi_util.c new file mode 100644 index 0000000000..1d0fc1731a --- /dev/null +++ b/src/soc/amd/morgana/espi_util.c @@ -0,0 +1,22 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +/* TODO: Update for Morgana */ + +#include +#include +#include + +#define ESPI_CNTRL_REGISTER 0x10 +#define LOCK_SPIX10_BIT2 BIT(3) +#define ESPI_MUX_SPI1 BIT(2) +#define ROM_ADDR_WR_PROT BIT(1) +#define DIS_ESPI_MASCTL_REG_WR BIT(0) + +void espi_switch_to_spi1_pads(void) +{ + uint8_t reg = spi_read8(ESPI_CNTRL_REGISTER); + + reg |= ESPI_MUX_SPI1; + + spi_write8(ESPI_CNTRL_REGISTER, reg); +} -- cgit v1.2.3