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| author | Felix Held <felix-coreboot@felixheld.de> | 2023-03-25 02:51:41 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-03-29 16:20:45 +0000 |
| commit | 2323acab6a7a4624e7f7de7e0f93e3aef4fc0157 (patch) | |
| tree | 3eb61ce11973efce31146f2c2d9ac33f8cd0c529 /src/soc/amd/mendocino/chipset_mendocino.cb | |
| parent | 52742b6dbd22203a919fb7555953e2839e6e776f (diff) | |
soc/amd/stoneyridge: implement and use get_pstate_0_reg
Introduce get_pstate_0_reg and use it in tsc_freq_mhz to get the P state
register number corresponding to P state 0.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I7b92a858bf36b04a570d99c656e5ccfc84457724
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74022
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Diffstat (limited to 'src/soc/amd/mendocino/chipset_mendocino.cb')
0 files changed, 0 insertions, 0 deletions