diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-12-12 19:36:55 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-12-14 13:04:28 +0000 |
| commit | d1065a3e640b6cc13a5901b77604ceb3e57063e0 (patch) | |
| tree | 5eb3fc878b83566aed7d9d7bccda717de2ec0e0d /src/soc/amd/genoa/Makefile.inc | |
| parent | 3d3e1cf060ccf5701e2ccb0a1698fa804badef90 (diff) | |
soc/amd/genoa: Add basic ACPI support
- DSDT
- MADT
- SSDT CPUs
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I0c86694ae83e9e6aa06a50a8a35bf2b24bc8ab65
Reviewed-on: https://review.coreboot.org/c/coreboot/+/76530
Reviewed-by: Martin Roth <martin.roth@amd.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Diffstat (limited to 'src/soc/amd/genoa/Makefile.inc')
| -rw-r--r-- | src/soc/amd/genoa/Makefile.inc | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/genoa/Makefile.inc b/src/soc/amd/genoa/Makefile.inc index 4b47886872..54c4a27883 100644 --- a/src/soc/amd/genoa/Makefile.inc +++ b/src/soc/amd/genoa/Makefile.inc @@ -13,6 +13,7 @@ bootblock-y += aoac.c romstage-y += romstage.c +ramstage-y += acpi.c ramstage-y += aoac.c ramstage-y += chip.c ramstage-y += cpu.c @@ -23,6 +24,7 @@ ramstage-y += mca.c smm-y += smihandler.c +CPPFLAGS_common += -I$(src)/soc/amd/genoa/acpi CPPFLAGS_common += -I$(src)/soc/amd/genoa/include ifeq ($(call int-gt, $(CONFIG_ROM_SIZE) 0x1000000), 1) |