diff options
| author | Felix Held <felix-coreboot@felixheld.de> | 2023-04-01 01:31:24 +0200 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2023-04-04 19:18:29 +0000 |
| commit | f008e0af165bc5ebedd1baabff896ddf9db21598 (patch) | |
| tree | d5bb415c1f17ad724bceb3b376b3a91ca1743ba2 /src/soc/amd/common/block/pm | |
| parent | 0d20e3c72050cb8a33b2c076a8a64de9590d0421 (diff) | |
soc/amd/*/Makefile: use all_x86 target
Use the newly introduced 'all_x86' make target to add the compilation
unit to all stages that run on the x86 cores, but not to verstage on
PSP.
TEST=Timeless builds for Mandolin without verstage on PSP and Guybrush
with verstage on PSP result in identical images with and without this
patch applied.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I94de6de5a4c7723065a4eb1b7149f9933ef134a1
Reviewed-on: https://review.coreboot.org/c/coreboot/+/74151
Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com>
Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/common/block/pm')
| -rw-r--r-- | src/soc/amd/common/block/pm/Makefile.inc | 8 |
1 files changed, 2 insertions, 6 deletions
diff --git a/src/soc/amd/common/block/pm/Makefile.inc b/src/soc/amd/common/block/pm/Makefile.inc index de1809a45b..cae40994f9 100644 --- a/src/soc/amd/common/block/pm/Makefile.inc +++ b/src/soc/amd/common/block/pm/Makefile.inc @@ -1,13 +1,9 @@ ## SPDX-License-Identifier: GPL-2.0-only -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c -bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c +all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c -verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c +bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c -romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c - -ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c |