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authorFelix Held <felix-coreboot@felixheld.de>2023-04-01 01:31:24 +0200
committerFelix Held <felix-coreboot@felixheld.de>2023-04-04 19:18:29 +0000
commitf008e0af165bc5ebedd1baabff896ddf9db21598 (patch)
treed5bb415c1f17ad724bceb3b376b3a91ca1743ba2 /src/soc/amd/common/block
parent0d20e3c72050cb8a33b2c076a8a64de9590d0421 (diff)
soc/amd/*/Makefile: use all_x86 target
Use the newly introduced 'all_x86' make target to add the compilation unit to all stages that run on the x86 cores, but not to verstage on PSP. TEST=Timeless builds for Mandolin without verstage on PSP and Guybrush with verstage on PSP result in identical images with and without this patch applied. Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Change-Id: I94de6de5a4c7723065a4eb1b7149f9933ef134a1 Reviewed-on: https://review.coreboot.org/c/coreboot/+/74151 Reviewed-by: Matt DeVillier <matt.devillier@amd.corp-partner.google.com> Reviewed-by: Fred Reitberger <reitbergerfred@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Arthur Heymans <arthur@aheymans.xyz>
Diffstat (limited to 'src/soc/amd/common/block')
-rw-r--r--src/soc/amd/common/block/acpi/Makefile.inc6
-rw-r--r--src/soc/amd/common/block/alink/Makefile.inc6
-rw-r--r--src/soc/amd/common/block/cpu/tsc/Makefile.inc23
-rw-r--r--src/soc/amd/common/block/lpc/Makefile.inc11
-rw-r--r--src/soc/amd/common/block/pci/Makefile.inc6
-rw-r--r--src/soc/amd/common/block/pm/Makefile.inc8
-rw-r--r--src/soc/amd/common/block/uart/Makefile.inc7
7 files changed, 12 insertions, 55 deletions
diff --git a/src/soc/amd/common/block/acpi/Makefile.inc b/src/soc/amd/common/block/acpi/Makefile.inc
index cf1e9c1a14..a0d92907a4 100644
--- a/src/soc/amd/common/block/acpi/Makefile.inc
+++ b/src/soc/amd/common/block/acpi/Makefile.inc
@@ -1,11 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ACPI),y)
-bootblock-y += acpi.c
-verstage_x86-y += acpi.c
-romstage-y += acpi.c
-ramstage-y += acpi.c
-postcar-y += acpi.c
+all_x86-y += acpi.c
smm-y += acpi.c
ramstage-y += pm_state.c
diff --git a/src/soc/amd/common/block/alink/Makefile.inc b/src/soc/amd/common/block/alink/Makefile.inc
index fbb96eef87..ef0728afc8 100644
--- a/src/soc/amd/common/block/alink/Makefile.inc
+++ b/src/soc/amd/common/block/alink/Makefile.inc
@@ -1,11 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_ALINK),y)
-bootblock-y += alink.c
-verstage_x86-y += alink.c
-romstage-y += alink.c
-postcar-y += alink.c
-ramstage-y += alink.c
+all_x86-y += alink.c
smm-y += alink.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_ALINK
diff --git a/src/soc/amd/common/block/cpu/tsc/Makefile.inc b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
index 65e849a36e..4ec0e0fa52 100644
--- a/src/soc/amd/common/block/cpu/tsc/Makefile.inc
+++ b/src/soc/amd/common/block/cpu/tsc/Makefile.inc
@@ -1,24 +1,9 @@
## SPDX-License-Identifier: GPL-2.0-only
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_TSC) += tsc_freq.c
-
-verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
-verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
-verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
-verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_TSC) += tsc_freq.c
-
-romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
-romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
-romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
-romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_TSC) += tsc_freq.c
-
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_TSC) += tsc_freq.c
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM1AH) += cpufreq_1a.c
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_TSC) += tsc_freq.c
smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM15H_16H) += cpufreq_15_16.c
smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_CPUFREQ_FAM17H_19H) += cpufreq_17_19.c
diff --git a/src/soc/amd/common/block/lpc/Makefile.inc b/src/soc/amd/common/block/lpc/Makefile.inc
index 6bec843020..11de514a08 100644
--- a/src/soc/amd/common/block/lpc/Makefile.inc
+++ b/src/soc/amd/common/block/lpc/Makefile.inc
@@ -3,20 +3,13 @@ ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC),y)
ramstage-y += lpc.c
-bootblock-y += lpc_util.c
-verstage_x86-y += lpc_util.c
-romstage-y += lpc_util.c
-postcar-y += lpc_util.c
-ramstage-y += lpc_util.c
+all_x86-y += lpc_util.c
smm-y += lpc_util.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA),y)
-bootblock-y += spi_dma.c
-verstage_x86-y += spi_dma.c
-romstage-y += spi_dma.c
-ramstage-y += spi_dma.c
+all_x86-y += spi_dma.c
smm-y += spi_dma.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_LPC_SPI_DMA
diff --git a/src/soc/amd/common/block/pci/Makefile.inc b/src/soc/amd/common/block/pci/Makefile.inc
index b938c67c75..372c6ce411 100644
--- a/src/soc/amd/common/block/pci/Makefile.inc
+++ b/src/soc/amd/common/block/pci/Makefile.inc
@@ -11,10 +11,6 @@ endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF),y)
-bootblock-y += amd_pci_mmconf.c
-verstage_x86-y += amd_pci_mmconf.c
-romstage-y += amd_pci_mmconf.c
-postcar-y += amd_pci_mmconf.c
-ramstage-y += amd_pci_mmconf.c
+all_x86-y += amd_pci_mmconf.c
endif # CONFIG_SOC_AMD_COMMON_BLOCK_PCI_MMCONF
diff --git a/src/soc/amd/common/block/pm/Makefile.inc b/src/soc/amd/common/block/pm/Makefile.inc
index de1809a45b..cae40994f9 100644
--- a/src/soc/amd/common/block/pm/Makefile.inc
+++ b/src/soc/amd/common/block/pm/Makefile.inc
@@ -1,13 +1,9 @@
## SPDX-License-Identifier: GPL-2.0-only
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c
-bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
+all_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
-verstage_x86-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
+bootblock-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM) += pmlib.c
romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
-romstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
-
-ramstage-$(CONFIG_SOC_AMD_COMMON_BLOCK_RESET) += reset.c
smm-$(CONFIG_SOC_AMD_COMMON_BLOCK_PM_CHIPSET_STATE_SAVE) += chipset_state.c
diff --git a/src/soc/amd/common/block/uart/Makefile.inc b/src/soc/amd/common/block/uart/Makefile.inc
index de7b68e3fd..bd182d9cb2 100644
--- a/src/soc/amd/common/block/uart/Makefile.inc
+++ b/src/soc/amd/common/block/uart/Makefile.inc
@@ -1,12 +1,7 @@
## SPDX-License-Identifier: GPL-2.0-only
ifeq ($(CONFIG_SOC_AMD_COMMON_BLOCK_UART),y)
-# all-y can't be used, since verstage on PSP has a different implementation
-bootblock-y += uart.c
-verstage_x86-y += uart.c
-romstage-y += uart.c
-postcar-y += uart.c
-ramstage-y += uart.c
+all_x86-y += uart.c
smm-$(CONFIG_DEBUG_SMI) += uart.c
all-$(CONFIG_AMD_SOC_CONSOLE_UART) += uart_console.c