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| author | Felix Held <felix-coreboot@felixheld.de> | 2021-12-14 23:34:33 +0100 |
|---|---|---|
| committer | Felix Held <felix-coreboot@felixheld.de> | 2021-12-15 22:40:08 +0000 |
| commit | fc373c7dac077397a24f0930b83b805fc21fa270 (patch) | |
| tree | 519184d4a1d71efa7d71ce03af458fd14cbf73e6 /src/soc/amd/common/block/include | |
| parent | 55dce1d55df554e684c87ab1baea9edfcb12aa09 (diff) | |
soc/amd/common/block/psp: move psp_notify_dram to psp_gen1.c
The MBOX_BIOS_CMD_DRAM_INFO PSP mailbox command is only available on the
first generation of PSP mailbox interface and not on the second
generation. The second generation of the PSP mailbox interface was
introduced with the AMD family 17h SoCs on which the DRAM is already
initialized before the x86 cores are released from reset.
Signed-off-by: Felix Held <felix-coreboot@felixheld.de>
Change-Id: I97b29fdc4a71d6493ec63fa60f580778f026ec0b
Reviewed-on: https://review.coreboot.org/c/coreboot/+/60124
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
Diffstat (limited to 'src/soc/amd/common/block/include')
| -rw-r--r-- | src/soc/amd/common/block/include/amdblocks/psp.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/src/soc/amd/common/block/include/amdblocks/psp.h b/src/soc/amd/common/block/include/amdblocks/psp.h index e749d75df1..c9986cae00 100644 --- a/src/soc/amd/common/block/include/amdblocks/psp.h +++ b/src/soc/amd/common/block/include/amdblocks/psp.h @@ -51,6 +51,8 @@ void soc_fill_smm_reg_info(struct smm_register_info *reg); /* v2 only */ #define PSPSTS_INVALID_NAME 8 #define PSPSTS_INVALID_BLOB 9 +/* PSP gen1-only. SoCs with PSP gen2 already have the DRAM initialized when + the x86 cores are released from reset. */ int psp_notify_dram(void); int psp_notify_smm(void); |