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authorKangheui Won <khwon@chromium.org>2021-05-14 15:17:50 +1000
committerWerner Zeh <werner.zeh@siemens.com>2021-06-07 05:16:20 +0000
commit260f0f93efa809d6aab5220253ca74410d0027c2 (patch)
treec04d7b31c9d2de76effb87066c17c41077197fed /src/soc/amd/common/acpi/upep.asl
parent32f43e0e134eded6221dd59400b2a01860c72f76 (diff)
cezanne/psp_verstage: add reset/timer svc
The new cezanne PSP release added support for these svcs. So add those functionality back to cezanne psp_verstage. BUG=b:187906425 Signed-off-by: Kangheui Won <khwon@chromium.org> Change-Id: Id542f5ed0762f582ea966466d67ed938ecb9c1f0 Reviewed-on: https://review.coreboot.org/c/coreboot/+/55137 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Raul Rangel <rrangel@chromium.org>
Diffstat (limited to 'src/soc/amd/common/acpi/upep.asl')
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